MC68HC912B32VFU8 Freescale Semiconductor, MC68HC912B32VFU8 Datasheet - Page 170
MC68HC912B32VFU8
Manufacturer Part Number
MC68HC912B32VFU8
Description
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68HC912B32VFU8.pdf
(334 pages)
Specifications of MC68HC912B32VFU8
Cpu Family
HC12
Device Core Size
16b
Frequency (max)
8MHz
Interface Type
SCI/SPI
Program Memory Type
EPROM
Program Memory Size
32KB
Total Internal Ram Size
1KB
# I/os (max)
63
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC912B32VFU8
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
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Enhanced Capture Timer (ECT) Module
Read: Anytime
Write: Anytime
EDGnB and EDGnA — Input Capture Edge Control Bits
170
To operate the 16-bit pulse accumulators A and B (PACA and PACB) independently of input capture
or output compare 7 and 0, respectively, the user must set the corresponding bits IOSn = 1, OMn = 0,
and OLn = 0. OC7M7 or OC7M0 in the OC7M register must also be cleared.
These eight pairs of control bits configure the input capture edge detector circuits. See
Address: $008A
Address: $008B
Reset:
Reset:
Read:
Read:
Write:
Write:
EDG7B
EDG3B
OMn
Bit 7
Bit 7
EDGnB
0
0
0
0
1
1
Table 13-2. Edge Detector Circuit Configuration
Figure 13-14. Timer Control Register 3 (TCTL3)
Figure 13-15. Timer Control Register 4 (TCTL4)
0
0
1
1
Table 13-1. Compare Result Output Action
OLn
EDG7A
EDG3A
0
1
0
1
6
0
6
0
M68HC12B Family Data Sheet, Rev. 9.1
EDGnA
Timer disconnected from output pin logic
Toggle OCn output line
Clear OCn output line to 0
Set OCn output line to 1
0
1
0
1
EDG6B
EDG2B
5
0
5
0
Capture disabled
Capture on rising edges only
Capture on falling edges only
Capture on any edge (rising or falling)
EDG6A
EDG2A
4
0
4
0
Action
Configuration
EDG5B
EDG1B
3
0
3
0
EDG5A
EDG1A
2
0
2
0
EDG4B
EDG0B
1
0
1
0
Freescale Semiconductor
EDG4A
EDG0A
Bit 0
Bit 0
0
0
Table
13-2.
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