DS3141+ Maxim Integrated Products, DS3141+ Datasheet - Page 44

• Manufacturer Part Number: DS3141+
• Description: IC FRAMER DS3/E3 SNGL 144CSBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS3141+

• Controller Type: DS3/E3 Framer
• Interface: LIU
• Voltage - Supply: 3.135 V ~ 3.465 V
• Current - Supply: 80mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 144-CSBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 to 15: CP-Bit Parity Error Count (CPE[15:0]). This count register contains the value of the internal CP-bit
parity error counter latched during the last error counter update. The internal counter counts the number of DS3
CP-bit parity errors. In E3 mode or M23 DS3 mode this counter is meaningless and should be ignored. A CP-bit
parity error is defined as an occurrence when the majority-decoded state of the three CP bits does not match the
parity calculation made on the information bits. Through the ECC control bit in the
can be configured to either continue counting CP-bit parity bit errors during an OOF event or not.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 to 15: Far-End Block Error Count (FEBE[15:0]). This count register contains the value of the internal
FEBE counter latched during the last error counter update. The internal counter counts the number of DS3 far-end
block errors (FEBE). In E3 mode or M23 DS3 mode this counter is meaningless and should be ignored. A FEBE is
defined as an occurrence when the three received FEBE bits do not equal 111. Through the ECC control bit in the
T3E3CR2
event or not.
register, the counter can be configured to either continue counting FEBE occurrences during an OOF
FEBE15
CPE15
FEBE7
CPE7
7
0
7
0
7
0
7
0
FEBE14
CPE14
FEBE6
CPE6
6
0
6
0
6
0
6
0
CPCR1
CP-Bit Parity Error Count Register 1
28h
CPCR2
CP-Bit Parity Error Count Register 2
29h
FEBECR1
Far-End Block Error Count Register 1
2Ah
FEBECR2
Far-End Block Error Count Register 2
2Bh
FEBE13
CPE13
FEBE5
CPE5
5
0
5
0
5
0
5
0
FEBE12
CPE12
FEBE4
44 of 88
CPE4
0
0
0
0
4
4
4
4
FEBE11
CPE11
FEBE3
CPE3
3
0
3
0
3
0
3
0
FEBE10
CPE10
FEBE2
CPE2
2
0
2
0
2
0
2
0
T3E3CR2
FEBE1
FEBE9
CPE1
CPE9
register, the counter
1
0
1
0
1
0
1
0
FEBE0
FEBE8
CPE0
CPE8
0
0
0
0
0
0
0
0