IDT82V2108PX IDT, Integrated Device Technology Inc, IDT82V2108PX Datasheet - Page 3

• Manufacturer Part Number: IDT82V2108PX
• Description: IC FRAMER T1/J1/E1 8CH 128-PQFP
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82V2108PX

• Controller Type: T1/E1/J1 Framer
• Interface: Parallel
• Voltage - Supply: 2.97 V ~ 3.63 V
• Current - Supply: 160mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 82V2108PX

1 PIN ASSIGNMENT ............................................................................................................................................................ 4
2 PIN DESCRIPTION ........................................................................................................................................................... 6
3 FUNCTIONAL DESCRIPTION ........................................................................................................................................ 12
Table of Contents
FEATURES ........................................................................................................................................................................ 1
APPLICATIONS ................................................................................................................................................................ 1
STANDARDS .................................................................................................................................................................... 1
DESCRIPTION .................................................................................................................................................................. 2
FUNCTIONAL BLOCK DIAGRAM .................................................................................................................................... 3
1.1 128 PIN PQFP PACKAGE (TOP VIEW) ........................................................................................................................................................ 4
1.2 144 PIN PBGA PACKAGE (BOTTOM VIEW) ............................................................................................................................................... 5
3.1 T1 / E1 / J1 MODE SELECTION .................................................................................................................................................................. 12
3.2 FRAME PROCESSOR (FRMP) .................................................................................................................................................................... 12
3.3 PERFORMANCE MONITOR (PMON) .......................................................................................................................................................... 20
3.4 ALARM DETECTOR (ALMD) - T1/J1 ONLY ............................................................................................................................................... 21
3.5 HDLC RECEIVER (RHDLC) ......................................................................................................................................................................... 22
3.6 BIT-ORIENTED MESSAGE RECEIVER (RBOM) - T1/J1 ONLY ................................................................................................................ 24
3.7 INBAND LOOPBACK CODE DETECTOR (IBCD) - T1/J1 ONLY ............................................................................................................... 24
3.8 ELASTIC STORE BUFFER (ELSB) ............................................................................................................................................................. 25
3.9 RECEIVE CAS/RBS BUFFER (RCRB) ........................................................................................................................................................ 26
3.10 RECEIVE PAYLOAD CONTROL (RPLC) .................................................................................................................................................... 28
3.2.1
3.2.2
3.3.1
3.3.2
3.5.1
3.5.2
3.8.1
3.8.2
3.9.1
3.9.2
3.10.1 E1 Mode .......................................................................................................................................................................................... 28
3.10.2 T1/J1 Mode ...................................................................................................................................................................................... 29
E1 Mode .......................................................................................................................................................................................... 12
3.2.1.1
3.2.1.2
3.2.1.3
T1/J1 Mode ...................................................................................................................................................................................... 18
3.2.2.1
3.2.2.2
E1 Mode .......................................................................................................................................................................................... 20
T1/J1 Mode ...................................................................................................................................................................................... 20
E1 Mode .......................................................................................................................................................................................... 22
T1/J1 Mode ...................................................................................................................................................................................... 22
E1 Mode .......................................................................................................................................................................................... 25
T1/J1 Mode ...................................................................................................................................................................................... 25
E1 Mode .......................................................................................................................................................................................... 26
T1/J1 Mode ...................................................................................................................................................................................... 27
Synchronization Searching ............................................................................................................................................... 14
3.2.1.1.1
3.2.1.1.2
3.2.1.1.3
Alarms & Bit Extraction ..................................................................................................................................................... 15
3.2.1.2.1
3.2.1.2.2
3.2.1.2.3
3.2.1.2.4
Interrupt Sources .............................................................................................................................................................. 16
Synchronization Searching ............................................................................................................................................... 18
3.2.2.1.1
3.2.2.1.2
Out Of Synchronization Detection & Interrupt .................................................................................................................. 19
Basic Frame .................................................................................................................................................. 14
CRC Multi-Frame ........................................................................................................................................... 14
CAS Signaling Multi-Frame ........................................................................................................................... 15
RED Alarm ..................................................................................................................................................... 15
AIS Alarm ...................................................................................................................................................... 15
Bit Extraction ................................................................................................................................................. 16
V5.2 Link ........................................................................................................................................................ 16
Super Frame (SF) Format ............................................................................................................................. 18
Extended Super Frame (ESF) Format ........................................................................................................... 18
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Table of Contents
March 5, 2009