IDT82V2108PX IDT, Integrated Device Technology Inc, IDT82V2108PX Datasheet - Page 200

• Manufacturer Part Number: IDT82V2108PX
• Description: IC FRAMER T1/J1/E1 8CH 128-PQFP
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82V2108PX

• Controller Type: T1/E1/J1 Framer
• Interface: Parallel
• Voltage - Supply: 2.97 V ~ 3.63 V
• Current - Supply: 160mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 82V2108PX

IDT82V2108
E1 RPLC Per-TS Configuration Registers (RPLC Indirect Registers 20H ~ 3FH)
TEST:
the test pattern from PRGD to replace the data in the corresponding time slot for test (when the RXPATGEN [b2, E1-00CH] is logic 1).
Similarly, all time slots set to be replaced with PRGD test pattern data are concatenated replaced by the PRBS.
DTRKC/NxTS:
when output on the RSDn/MRSD pin.
when output on the RSDn/MRSD pin.
STRKC:
61~7FH) when output on the RSSIGn/MRSSIG pin.
61~7FH) when output on the RSSIGn/MRSSIG pin.
DMW:
DMWALAW:
Programming Information
Bit Name
Default
Bit No.
Type
= 0: Disable the data in the corresponding time slot to be tested by PRGD.
= 1: Enable the data in the corresponding time slot to be extracted to PRGD for test (when the RXPATGEN [b2, E1-00CH] is logic 0), or enable
All the time slots that are extracted to the PRGD are concatenated and treated as a continuous stream in which pseudo random is searched for.
= 0: Disable the data in the corresponding time slot to be replaced by the data set in the DTRK[7:0] (b7~0, E1-RPLC-indirect registers-40~5FH)
= 1: Enable the data in the corresponding time slot to be replaced by the data set in the DTRK[7:0] (b7~0, E1-RPLC-indirect registers-40~5FH)
In addition, it controls RSCKn of the corresponding time slot in Receive Clock Slave Fractional E1 mode:
= 0: RSCKn is clocked for the corresponding time slot.
= 1: RSCKn is held in its inactive state.
= 0: Disable the signaling of the corresponding time slot to be replaced by the data set in the A, B, C, D (b3~0, E1-RPLC-indirect registers-
= 1: Enable the signaling of the corresponding time slot to be replaced by the data set in the A, B, C, D (b3~0, E1-RPLC-indirect registers-
= 0: Disallow the data in the corresponding time slot to be replaced by a digital milliwatt pattern when output on the RSDn/MRSD pin.
= 1: Enable the data in the corresponding time slot to be replaced by a digital milliwatt pattern when output on the RSDn/MRSD pin.
= 0: The milliwatt pattern is the µ-Law pattern.
= 1: The milliwatt pattern is the A-Law pattern.
TEST
R/W
X
7
20H ~ 3FH
40H ~ 5FH
61H ~ 7FH
DTRKC/NxTS
R/W
6
X
STRKC
R/W
X
5
RPLC Indirect Registers Map
DMW
R/W
X
4
190
Data Trunk Conditioning Code Byte for TS0 ~ TS31
Signaling Trunk Conditioning Byte for TS1 ~ TS31
Per-TS Configuration Byte for TS0 ~ TS31
DMWALAW
R/W
X
3
SIGNINV
R/W
2
X
T1 / E1 / J1 OCTAL FRAMER
RINV[1]
R/W
X
1
March 5, 2009
RINV[0]
R/W
X
0