IDT82V2108PX IDT, Integrated Device Technology Inc, IDT82V2108PX Datasheet - Page 240

• Manufacturer Part Number: IDT82V2108PX
• Description: IC FRAMER T1/J1/E1 8CH 128-PQFP
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82V2108PX

• Controller Type: T1/E1/J1 Framer
• Interface: Parallel
• Voltage - Supply: 2.97 V ~ 3.63 V
• Current - Supply: 160mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 82V2108PX

IDT82V2108
T1 / J1 ALMD Configuration (02CH, 0ACH, 12CH, 1ACH, 22CH, 2ACH, 32CH, 3ACH)
J1_YEL:
ESF:
T1 / J1 ALMD Interrupt Enable (02DH, 0ADH, 12DH, 1ADH, 22DH, 2ADH, 32DH, 3ADH)
FASTD:
AIS signal has been absent for 16.8 sec (±500 ms).
has been absent for 180 ms.
YELE:
REDE:
AISE:
Programming Information
Bit Name
Bit Name
Default
Bit No.
Default
Bit No.
Type
This bit selects the T1 or J1 mode in the Alarm Detector block.
= 0: T1 mode is selected in the ALMD block.
= 1: J1 mode is selected in the ALMD block.
This bit selects the SF or ESF format in the Alarm Detector block.
= 0: SF format is selected.
= 1: ESF format is selected.
= 0: RED Alarm is cleared when the out of SF/ESF synchronization event has been absent for 16.6 sec (±500 ms); AIS Alarm is cleared when the
= 1: RED Alarm is cleared when the out of SF/ESF synchronization event has been absent for 120 ms; AIS Alarm is cleared when the AIS signal
= 0: Disable the interrupt on the INT pin when the YELI (b5, T1/J1-02EH) is logic one.
= 1: Enable the interrupt on the INT pin when the YELI (b5, T1/J1-02EH) is logic one.
= 0: Disable the interrupt on the INT pin when the REDI (b4, T1/J1-02EH) is logic one.
= 1: Enable the interrupt on the INT pin when the REDI (b4, T1/J1-02EH) is logic one.
= 0: Disable the interrupt on the INT pin when the AISI (b3, T1/J1-02EH) is logic one.
= 1: Enable the interrupt on the INT pin when the AISI (b3, T1/J1-02EH) is logic one.
Type
7
7
Reserved
Reserved
6
6
J1_YEL
R/W
5
0
5
FASTD
ESF
R/W
R/W
4
0
4
0
230
Reserved
3
3
YELE
R/W
2
0
2
Reserved
T1 / E1 / J1 OCTAL FRAMER
REDE
R/W
1
0
1
March 5, 2009
AISE
R/W
0
0
0