IDT77010L155PQF IDT, Integrated Device Technology Inc, IDT77010L155PQF Datasheet
IDT77010L155PQF
Specifications of IDT77010L155PQF
Available stocks
Related parts for IDT77010L155PQF
IDT77010L155PQF Summary of contents
Page 1
Features Features Features Features ! Single chip ATM Layer UTOPIA Level 1 to 4-bit DPI interface. ! Supports ATM Forum UTOPIA Level 1 interface. ! Supports ATM device interface in Cell mode. ! Capable of full-duplex operation up-to 160 Mbps. ...
Page 2
IDT77010 Block Diagram Block Diagram Block Diagram Block Diagram 8 UTOPIA Interface 8 8 Pin Configuration Pin Configuration Pin Configuration Pin Configuration 1,2 1,2 1,2 1,2 INDEX DATA7 X T DATA6 X T DATA5 X T DATA4 ...
Page 3
IDT77010 Pin Definitions Pin Definitions Pin Definitions Pin Definitions Pin Input/ Signal Name Number Output SysClk 29 I RST 23 I LCRST 24 I CONT_A 19 O CONT_B 22 O RxLED 42 O TxLED 79 O READ 73 O WRITE ...
Page 4
IDT77010 Pin Input/ Signal Name Number Output RxData7 55 I TENB 18 O TCLK 16 O TCLAV 17 I TSOC 2 O TxData0 13 O TxData1 12 O TxData2 11 O TxData3 10 O TxData4 9 O TxData5 6 O ...
Page 5
IDT77010 Absolute Maximum Ratings Absolute Maximum Ratings Absolute Maximum Ratings Absolute Maximum Ratings Symbol V 5V Digital Supply Voltage CC V 3.3V Digital Supply Voltage DD V Digital Input Voltage IN I Output Current OUT T Storage Temperature STG Recommended ...
Page 6
IDT77010 Device Interface Device Interface Device Interface Device Interface This 77010 uses a UTOPIA level 1 interface to receive and transmit ATM cells to and from the PHY device. It mirrors the ATM layer as shown in Figure 3 below. ...
Page 7
IDT77010 UTOPIA Receive Interface Operation UTOPIA Receive Interface Operation UTOPIA Receive Interface Operation UTOPIA Receive Interface Operation UTOPIA cell level handshake is used to receive an ATM cell from a UTOPIA PHY device. The UTOPIA Receive Clock (RCLK ...
Page 8
IDT77010 Input Control Cell Formatting Input Control Cell Formatting Input Control Cell Formatting Input Control Cell Formatting Control cells are generated by a remote computer and are used to configure and monitor the PHY registers. All cells having the header ...
Page 9
IDT77010 Cell Byte Bit Function Number Number . 7-0 reserved . 7-0 reserved 52 7-0 reserved 1. This value can be programmed by instream control cells. DPI Bus Data Sequence DPI Bus Data Sequence DPI Bus Data Sequence DPI Bus ...
Page 10
IDT77010 Receive DPI Bus Interface Receive DPI Bus Interface Receive DPI Bus Interface Receive DPI Bus Interface The Receive DPI Clock (DRxCLK continuous clock generated from SYSCLK and is twice the frequency of RCLK. The Receive Start of ...
Page 11
IDT77010 Utility Bus Read Operation Utility Bus Read Operation Utility Bus Read Operation Utility Bus Read Operation When the 77010 decodes the command cells for a Utility bus read operation, it drives the PHY chip select (PHYCS), Address Latch Enable ...
Page 12
IDT77010 Command Cells Command Cells Command Cells Command Cells Reset PHY Chip Command Reset PHY Chip Command Reset PHY Chip Command Reset PHY Chip Command Resets the PHY device and the Utility bus. PHYRST will assert low for 16 SYSCLK ...
Page 13
IDT77010 Status Read Command Status Read Command Status Read Command Status Read Command This command reads the 77010 Revision number and the Interrupt pin state, and causes an internally generated cell. See internally generated cell format section. Command Fields Field ...
Page 14
IDT77010 Internally Generated Reply Cell Table - Data A Internally Generated Reply Cell Table - Data A Internally Generated Reply Cell Table - Data A Internally Generated Reply Cell Table - Data A Internally Generated Cell Type Utility Bus Read ...
Page 15
IDT77010 Symbol t SCLK Cycle Time CYC t SCLK High Time CH t SCLK Low Time CL t UTOPIA TCLK/RCLK Cycle Time UCYC t UTOPIA TCLK/RCLK High Time UCH t UTOPIA TCLK/RCLK Low Time UCL t TxDATA, TxPRTY, TENB, TSOC ...
Page 16
IDT77010 Symbol t System Clock to Utopia Transmit Clock Propagation Delay PTCLK t System Clock to DPI Receive Clock Propagation Delay PDRxCLK t System Clock to DPI Transmit Clock Propagation Delay PDTxCLK t System Clock to RxLED Propagation Delay PRLED ...
Page 17
IDT77010 System Clock Timing Waveform System Clock Timing Waveform System Clock Timing Waveform System Clock Timing Waveform SYSCLK UTOPIA Transmit Timing Waveform UTOPIA Transmit Timing Waveform UTOPIA Transmit Timing Waveform UTOPIA Transmit Timing Waveform TxDATA(0-7), TENB, TSOC TCLAV UTOPIA Receive ...
Page 18
IDT77010 System Clock to UTOPIA Receive Clock Propagation Delay System Clock to UTOPIA Receive Clock Propagation Delay System Clock to UTOPIA Receive Clock Propagation Delay System Clock to UTOPIA Receive Clock Propagation Delay SYSCLK RCLK System Clock to UTOPIA Transmit ...
Page 19
IDT77010 System Clock to Count_A Propagation Delay System Clock to Count_A Propagation Delay System Clock to Count_A Propagation Delay System Clock to Count_A Propagation Delay SYSCLK CONT_A System Clock to Count_B Propagation Delay System Clock to Count_B Propagation Delay System ...
Page 20
IDT77010 Package Information Package Information Package Information Package Information Plastic QFP 80pin Body size 1.4mm (QFP14 Symbol Min E 11 0.13 C 0.1 q ...
Page 21
IDT77010 Ordering Information Ordering Information Ordering Information Ordering Information IDT XXXXX A 999 Device Power Speed Type Data Sheet Document History Data Sheet Document History Data Sheet Document History Data Sheet Document History 4/02/99 Changed format 5/18/99 Changed tDTH from ...