IDT82V2108PX IDT, Integrated Device Technology Inc, IDT82V2108PX Datasheet - Page 264

• Manufacturer Part Number: IDT82V2108PX
• Description: IC FRAMER T1/J1/E1 8CH 128-PQFP
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82V2108PX

• Controller Type: T1/E1/J1 Framer
• Interface: Parallel
• Voltage - Supply: 2.97 V ~ 3.63 V
• Current - Supply: 160mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 82V2108PX

IDT82V2108
FIX:
POL:
the pattern generated in the PRGD; Invert the bits in the channel; Fix the signaling bit.
T1 / J1 RPLC Data Trunk Conditioning Code Byte Registers (RPLC Indirect Registers 19H ~ 30H)
RPLC-indirect registers-01~18H) is logic 1. DTRK7 is the MSB.
T1 / J1 RPLC Signaling Trunk Conditioning Byte Registers (RPLC Indirect Registers 31H ~ 48H)
STRKC:
31~48H) when output on the RSSIGn/MRSSIG pin.
31~48H) when output on the RSSIGn/MRSSIG pin.
A, B, C, D:
rect registers-31~48H) is logic 1. They are in the least significant nibble.
Programming Information
Bit Name
Bit Name
Default
Default
Bit No.
Bit No.
Type
Type
= 0: Disable the signaling bit of the corresponding channel to be fixed with the value set by the POL when output on the RSDn/MRSD pin.
= 1: Enable the signaling bit of the corresponding channel to be fixed with the value set by the POL when output on the RSDn/MRSD pin.
Valid when the FIX is logic 1:
= 0: Fix the signaling bit of the corresponding channel to be logic 0.
= 1: Fix the signaling bit of the corresponding channel to be logic 1.
The priority of the RPLC operation of the corresponding channel on the RSDn/MRSD pin from high to low is:
Extract data to PRGD for test; Replace the data with the value in the DTRK[7:0]; Replace the data with the milliwatt pattern; Replace the data with
These indirect registers contain the data that will replace the data output on the RSDn/MRSD pin when the corresponding DTRKC (b6, T1/J1-
= 0: Disable the signaling of the corresponding channel to be replaced by the data set in the A, B, C, D (b3~0, T1/J1-RPLC-indirect registers-
= 1: Enable the signaling of the corresponding channel to be replaced by the data set in the A, B, C, D (b3~0, T1/J1-RPLC-indirect registers-
These bits contain the data that will replace the data output on the RSSIGn/MRSSIG pin when the corresponding STRKC (b7, T1/J1-RPLC-indi-
STRKC
DTRK7
R/W
R/W
X
X
7
7
DTRK6
R/W
6
X
6
Reserved
DTRK5
R/W
X
5
5
DTRK4
R/W
X
4
4
254
DTRK3
R/W
R/W
X
A
X
3
3
DTRK2
R/W
R/W
2
X
2
B
X
T1 / E1 / J1 OCTAL FRAMER
DTRK1
R/W
R/W
X
C
X
1
1
March 5, 2009
DTRK0
R/W
R/W
X
D
X
0
0