IDTCV123PV IDT, Integrated Device Technology Inc, IDTCV123PV Datasheet

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IDTCV123PV

Manufacturer Part Number
IDTCV123PV
Description
IC FLEXPC CLK PROGR P4 56-SSOP
Manufacturer
IDT, Integrated Device Technology Inc
Series
FlexPC™r
Type
PC Clockr
Datasheet

Specifications of IDTCV123PV

Input
Crystal
Output
Clock
Frequency - Max
400MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-SSOP
Frequency-max
400MHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
CV123PV
FEATURES:
• One high precision PLL for CPU, with SSC and N program-
• One high precision PLL for SRC/PCI/SATA, SSC and N pro-
• One high precision PLL for 96MHz/48MHz
• Band-gap circuit for differential outputs
• Supports spread spectrum modulation, down spread 0.5%
• Supports SMBus block read/write, index read/write
• Selectable output strength for REF
• Allows for CPU frequency to change to a higher frequency for
• Available in SSOP package
OUTPUTS:
• 2*0.7V current –mode differential CPU CLK pair
• 8*0.7V current –mode differential SRC CLK pair, one dedicated
• One CPU_ITP/SRC selectable CLK pair
• 8*PCI, 3 free running, 33.3MHz
• 1*96MHz, 1*48MHz
• 2*REF
FUNCTIONAL BLOCK DIAGRAM
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
© 2004 Integrated Device Technology, Inc.
IDTCV123
PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR
mable
grammable
maximum system computing power
for SATA
V
TT_PWRGD
FSA.B.C
SDATA
SCLK
#/PD
X1
X2
Controller
Osc Amp
SM Bus
Control
XTAL
Logic
PROGRAMMABLE FLEXPC™
CLOCK FOR P4 PROCESSOR
N Programmable
N Programmable
PLL3
PLL1
SSC
PLL2
SSC
1
DESCRIPTION:
support up to 400MHz processor. This chip has three PLLs inside for CPU/
SRC/PCI, SATA, and 48MHz/DOT96 IO clocks. One dedicated PLL for Serial
ATA clock provides high accuracy frequency. This device also implements
Band-gap referenced I
outputs, which can provide more robust system performance.
ppm, providing high accuracy output clock. Each CPU/SRC/PCI, SATA clock
has its own Spread Spectrum selection, which allows for isolated changes
instead of affecting other clock groups.
KEY SPECIFICATION:
• CPU/SRC CLK cycle to cycle jitter < 85ps
• SATA CLK cycle to cycle jitter < 85ps
• PCI CLK cycle to cycle jitter < 250ps
• Static PLL frequency divide error < 114 ppm
• Static PLL frequency divide error for 48MHz < 5 ppm
IDTCV123 is a 56 pin clock device. The CPU output buffer is designed to
Static PLL frequency divide error can be as low as 36 ppm, worse case 114
48MHz/96MHz
Output Buffers
Output Buffer
Output BUffer
Stop Logic
Stop Logic
SRC CLK
CPU CLK
I
I
REF
REF
REF
to reduce the impact of V
ITP_EN
COMMERCIAL TEMPERATURE RANGE
CPU_ITP/SRC6
PCI[5:0], PCIF[2:0]
SRC[6:0]
SATA_SRC
CPU[1:0]
REF[0:1]
48MHz
DOT96
DD
variation on differential
IDTCV123
MAY 2004
DSC-6538/6

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IDTCV123PV Summary of contents

Page 1

IDTCV123 PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR FEATURES: • One high precision PLL for CPU, with SSC and N program- mable • One high precision PLL for SRC/PCI/SATA, SSC and N pro- grammable • One high precision PLL for 96MHz/48MHz ...

Page 2

IDTCV123 PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR PIN CONFIGURATION PCI0 1 PCI1 _PCI DD GND_PCI 4 PCI2 5 6 PCI3 7 PCI4 8 PCI5 GND_PCI 9 V _PCI *TEST_SEL/PCIF0 ITP_EN/PCIF1 ...

Page 3

IDTCV123 PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR PIN DESCRIPTION Pin Number Name 1 PCI0 2 PCI1 3 V _PCI _PCI SS 5 PCI2 6 PCI3 7 PCI4 8 PCI5 9 V _PCI _PCI DD ...

Page 4

IDTCV123 PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR PIN DESCRIPTION (CONT.) Pin Number Name 43 CPUC1 44 CPUT1 45 V _CPU DD 46 CPUC0 47 CPUT0 48 V _CPU SS 49 SCL 50 SDA 51 XTAL_OUT 52 XTAL_IN 53 V _REF ...

Page 5

IDTCV123 PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR CONTROL REGISTERS N PROGRAMMING PROCEDURE Use Index byte write. • For N programming, the user only needs to access Byte17, Byte 25, and Byte8. • 1. Write Byte17 for CPU PLL N, CPU ...

Page 6

IDTCV123 PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR BYTE 0 Bit Output(s) Affected 7 CPUT2, CPUC2/ SRCT6, SRCC6 6 SRCT5, SRCC5 5 SRCT4, SRCC4 4 SRCT3, SRCC3 3 SATAT, SATAC 2 SRCT2, SRCC2 1 SRCT1, SRCC1 0 SRCT0, SRCC0 BYTE 1 ...

Page 7

IDTCV123 PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR BYTE 4 Bit Output(s) Affected 7 Reserved 6 DOT96 5 PCIF1 4 PCIF0 3 Reserved 2 Reserved 1 Reserved 0 Reserved BYTE 5 Bit Output(s) Affected 7 Stopped SRC 6 Reserved 5 Reserved ...

Page 8

IDTCV123 PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR BYTE 8 Bit Output(s) Affected 7 SRC SSC enable USB48 2 Reserve 1 0 One cycle read BYTE 9 Bit Output(s) Affected 7 6 CPU SMC2 5 CPU SMC1 ...

Page 9

IDTCV123 PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR BYTE 25 Bit Output(s) Affected 7 SRC_N7, MSB 6 SRC_N6 5 SRC_N5 4 SRC_N4 3 SRC_N3 2 SRC_N2 1 SRC_N1 0 SRC_N0, LSB BYTES 26-31: OUTPUT WAVEFORM ADJUSTMENT. DON'T WRITE OVER. Description / ...

Page 10

IDTCV123 PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR ELECTRICAL CHARACTERISTICS - INPUT / SUPPLY / COMMON OUTPUT PARAMETERS Following Conditions Apply Unless Otherwise Specified: Operating Condition 0°C to +70°C, Supply Voltage Symbol Parameter V Input HIGH Voltage ...

Page 11

IDTCV123 PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR ELECTRICAL CHARACTERISTICS - CPU, SRC, AND DOT96 0.7 CURRENT MODE DIFFERENTIAL PAIR (1) Following Conditions Apply Unless Otherwise Specified: Operating Condition 0°C to +70°C, Supply Voltage Symbol Parameter Z ...

Page 12

IDTCV123 PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR ELECTRICAL CHARACTERISTICS - PCICLK / PCICLK_F Following Conditions Apply Unless Otherwise Specified: Operating Condition 0°C to +70°C, Supply Voltage Symbol Parameter (1,2) ppm Long Accuracy (2) T Clock Period ...

Page 13

IDTCV123 PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR ELECTRICAL CHARACTERISTICS - REF-14.318MHZ Following Conditions Apply Unless Otherwise Specified: Operating Condition 0°C to +70°C, Supply Voltage Symbol Parameter (1) ppm Long Accuracy T Clock Period PERIOD (1) V ...

Page 14

IDTCV123 PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR PD, POWER DOWN asynchronous active high input used to shut off all clocks cleanly prior to clock power. When PD is asserted high all clocks will be driven low before ...

Page 15

IDTCV123 PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR PD DE-ASSERTION The time from the de-assertion until power supply ramps to get stable clocks will be less than 1.8ms. If the drive mode control bit for PD tristate is ...

Page 16

IDTCV123 PROGRAMMABLE FLEXPC™ CLOCK FOR P4 PROCESSOR ORDERING INFORMATION IDTCV XXX XX Device Type Package CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 X Grade Blank Commercial Temperature Range (0°C to +70°C) PV Small Shrink Outline Package ...

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