MCF5272CVF66 Freescale Semiconductor, MCF5272CVF66 Datasheet - Page 402
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MCF5272CVF66
Manufacturer Part Number
MCF5272CVF66
Description
IC MPU 32BIT 66MHZ 196-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Specifications of MCF5272CVF66
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
Peripherals
DMA, WDT
Number Of I /o
32
Program Memory Size
16KB (4K x 32)
Program Memory Type
ROM
Ram Size
1K x 32
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
196-MAPBGA
Family Name
MCF5xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
196
Package Type
MA-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Not Compliant
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General Purpose I/O Module
17.2.3
There is no port C control register. Port C is enabled only when the external data bus is 16 bits wide. This
is done by holding QSPI_DOUT/WSEL high during reset. When QSPI_DOUT/WSEL is low during reset,
the external data bus is 32 bits wide and port C is unavailable.
17.2.4
PDCNT, shown in
GPIO capability. Port D has no data register nor data direction register.
Table 17-7
17-8
31–16
15–14
13–12
11–10
Bits
9–8
Reset
Reset
Field
Field
Addr
R/W
R/W
describes PDCNT fields.
Port C Control Register
Port D Control Register (PDCNT)
PDCNT7
PDCNT7
PDCNT6
PDCNT5
PDCNT4
31
15
Name
—
14
Table
MCF5272 ColdFire
Reserved
Configure pin K6.
00 High impedance
01 PWM_OUT2
10 TIN1
11 Reserved
Configure pin P5.
00 High impedance
01 PWM_OUT1
10 TOUT1
11 Reserved
Configure pin P2.
00 High impedance
01 Reserved
10 DIN3
11 INT4
Configure pin K1.
00 High impedance
01 DOUT0
10 URT1_TxD
11 Reserved
PDCNT6
13
17-8, is used to configure pins that have multiple functions but no associated
12
Figure 17-3. Port D Control Register (PDCNT)
Table 17-7. PDCNT Field Descriptions
PDCNT5
11
Table 17-8
®
Integrated Microprocessor User’s Manual, Rev. 3
10
0000_0000_0000_0000
PDCNT4
9
provides the same information organized by function.
MBAR + 0x0098
Read/Write
8
—
—
—
PDCNT3
7
Description
6
PDCNT2
5
4
PDCNT1
3
Freescale Semiconductor
2
PDCNT0
1
16
0
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