MCF5272CVF66 Freescale Semiconductor, MCF5272CVF66 Datasheet - Page 215

• Manufacturer Part Number: MCF5272CVF66
• Description: IC MPU 32BIT 66MHZ 196-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5272CVF66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (4K x 32)
• Program Memory Type: ROM
• Ram Size: 1K x 32
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 196-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Not Compliant

Freescale Semiconductor
19–18
17–15
14–13
12–10
Bits
9–8
4–2
7
6
5
DSTM
SRCM
Name
SRCT
DSTT
DSTS
RQM
—
—
—
Request mode. Determines the request mode of the channel. This must be 11.
00–10 Reserved, do not use.
11 Dual address request mode. Both the DMA source and DMA destination are memory addresses. The
Reserved, should be cleared.
Destination addressing mode for the channel.
00 Static address mode
01 Increment address mode
1x Reserved, do not use.
Destination addressing type. Used internal to the MCF5272 to qualify the address bits. This value should
be compatible with the CSCRn[TM] value used for external RAM or peripheral device access.
000 Reserved
001 User data access
010 User code access
011–100 Reserved
101 Supervisor data access
110 Supervisor code access
111 Reserved
Destination data transfer type. The DMA controller buffers data from the source address data fetches until
there are enough bytes to perform a destination data write of the size programmed in these bits. Thus it is
possible to configure source accesses to be byte type and destination addresses to be line burst type. In
this case 16 individual byte reads are performed followed by an indivisible burst write of four longwords.
Longword or line bursts are the most efficient data transfers.
Reserved, should be cleared.
Reserved, should be cleared.
Source addressing mode of the channel.
0 Static address mode
1 Increment address mode
Source addressing type. Used internal to the MCF5272 to qualify the address bits. The value should be
compatible with the CSCRn[TM] value used for external RAM or peripheral device access.
000 Reserved
001 User data access
010 User code access
011 Reserved
100 Reserved
101 Supervisor data access
110 Supervisor code access
111 Reserved
MCF5272 supports only dual-address request mode.
MCF5272 ColdFire
DSTS
00
01
10
11
Table 10-2. DMR Field Descriptions (continued)
Longword
Byte
Word
16-byte line burst
®
Data Transfer Type
Integrated Microprocessor User’s Manual, Rev. 3
Description
4
1
2
16. Valid only for SDRAM.
Address Incremented by
DMA Controller
10-3