HD6417727BP100BV Renesas Electronics America, HD6417727BP100BV Datasheet - Page 888

IC SUPERH MPU ROMLESS 240BGA

HD6417727BP100BV

Manufacturer Part Number
HD6417727BP100BV
Description
IC SUPERH MPU ROMLESS 240BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727BP100BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Section 26 Pin Function Controller (PFC)
26.3.4
Port D Control Register (PDCR) is a 16-bit read/write register that selects the pin functions.
PDCR is initialized to H'AAAA by power-on resets; however, it is not initialized by manual
resets, in standby mode, or in sleep mode.
Bits 15, 14: PD7 Mode 1, 0 (PD7MD1, PD7MD0)
Bits 13, 12: PD6 Mode 1, 0 (PD6MD1, PD6MD0)
Bits 11, 10: PD5 Mode 1, 0 (PD5MD1, PD5MD0)
Bits 9, 8: PD4 Mode 1, 0 (PD4MD1, PD4MD0)
Bits 7, 6: PD3 Mode 1, 0 (PD3MD1, PD3MD0)
Bits 5, 4: PD2 Mode 1, 0 (PD2MD1, PD2MD0)
Bits 3, 2: PD1 Mode 1, 0 (PD1MD1, PD1MD0)
Bits 1, 0: PD0 Mode 1, 0 (PD0MD1, PD0MD0)
These bits select the pin functions and the input pullup MOS control.
Bit (2n + 1)
PDnMD1
0
0
1
1
Rev.6.00 Mar. 27, 2009 Page 830 of 1036
REJ09B0254-0600
Initial value:
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit:
Port D Control Register (PDCR)
MD1
PD7
15
1
Bit 2n
PDnMD0
0
1
0
1
MD0
PD7
14
0
MD1
PD6
13
1
MD0
PD6
12
Other function (see table 26.1)
Port output (n = value other than 4 or 6), reserved (n = 4 or 6)
Port input (Pullup MOS: on)
Port input (Pullup MOS: off)
Pin Function
0
MD1
PD5
11
1
MD0
PD5
10
0
MD1
PD4
9
1
MD0
PD4
8
0
MD1
PD3
7
1
MD0
PD3
6
0
MD1
PD2
5
1
MD0
PD2
4
0
MD1
PD1
3
1
MD0
PD1
(Initial value)
2
0
(n = 0 to 7)
MD1
PD0
1
1
MD0
PD0
0
0

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