HD6417727BP100BV Renesas Electronics America, HD6417727BP100BV Datasheet - Page 619
![IC SUPERH MPU ROMLESS 240BGA](/photos/28/61/286131/240-lfbga__plbg0240ja-a_sml.jpg)
HD6417727BP100BV
Manufacturer Part Number
HD6417727BP100BV
Description
IC SUPERH MPU ROMLESS 240BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417727BP100CV.pdf
(1098 pages)
Specifications of HD6417727BP100BV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
- Current page: 619 of 1098
- Download datasheet (7Mb)
Switching Modes: When switching from receive mode to transmit mode, check that the receive
operation is completed before starting initialization and setting RE to 0 and TE to 1. The RDRF,
PER, and ORER flags can be used to check if reception is completed. When switching from
transmit mode to receive mode, check that the transmit operation is completed before starting
initialization and setting TE to 0 and RE to 1. The TEND flag can be used to check if transmission
is completed.
Interrupt Operation: In the smart card interface mode, there are three types of interrupts:
transmit-data-empty (TXI), communication error (ERI) and receive-data-full (RXI). In this mode,
the transmit-end interrupt (TEI) cannot be requested.
Set the TEND flag in SCSSR to 1 to request a TXI interrupt. Set the RDRF flag in SCSSR to 1 to
request an RXI interrupt. Set the ORER, PER, or FER/ERS flag in SCSSR to 1 to request an ERI
interrupt (table 18.9).
Table 18.9 Smart Card Mode Operating State and Interrupt Sources
Mode
Transmit mode
Receive mode
18.4
When the SCI is used as a smart card interface, be sure that all criteria in sections 18.4.1, Receive
Data Timing and Receive Margin in Asynchronous Mode and 18.4.2, Retransmission (Receive
and Transmit Modes) are applied.
18.4.1
In asynchronous mode, the SCI runs on a basic clock with a frequency of 372 times the transfer
rate. During reception, the SCI0 samples the falling of the start bit using the base clock to achieve
internal synchronization. Receive data is latched internally on the rising edge of the 186th basic
clock cycle (figure 18.8).
Usage Notes
Receive Data Timing and Receive Margin in Asynchronous Mode
State
Normal
Error
Normal
Error
Flag
TEND
FER/ERS
RDRF
PER,
ORER
Rev.6.00 Mar. 27, 2009 Page 561 of 1036
Mask Bit
TIE
RIE
RIE
RIE
Section 18 Smart Card Interface
Interrupt Source
TXI
ERI
RXI
ERI
REJ09B0254-0600
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