HD6417727BP100BV Renesas Electronics America, HD6417727BP100BV Datasheet - Page 234

• Manufacturer Part Number: HD6417727BP100BV
• Description: IC SUPERH MPU ROMLESS 240BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727BP100BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Section 7 Interrupt Controller (INTC)
Table 7.5
Interrupt Source
NMI
H-UDI
IRL
IRQ
PINT
DMAC
SCIF
Rev.6.00 Mar. 27, 2009 Page 176 of 1036
REJ09B0254-0600
IRL(3:0) = 0000
IRL(3:0) = 0001 H'220 (H'220)
IRL(3:0) = 0010
IRL(3:0) = 0011 H'260 (H'260)
IRL(3:0) = 0100
IRL(3:0) = 0101
IRL(3:0) = 0110
IRL(3:0) = 0111
IRL(3:0) = 1000
IRL(3:0) = 1001
IRL(3:0) = 1010
IRL(3:0) = 1011
IRL(3:0) = 1100
IRL(3:0) = 1101
IRL(3:0) = 1110
IRQ4
IRQ5
PINT0–7
PINT8–15
DEI0
DEI1
DEI2
DEI3
ERI2
RXI2
BRI2
TXI2
Interrupt Exception Handling Sources and Priority (IRL Mode)
INTEVT Code
(INTEVT2 Code)
H'1C0 (H'1C0)
H'5E0 (H'5E0)
H'200 (H'200)
H'240 (H'240)
H'280 (H'280)
H'2A0 (H'2A0)
H'2C0 (H'2C0)
H'2E0 (H'2E0)
H'300 (H'300)
H'320 (H'320)
H'340 (H'340)
H'360 (H'360)
H'380 (H'380)
H'3A0 (H'3A0)
H'3C0 (H'3C0)
H'200–3C0* (H'680)
H'200–3C0* (H'6A0)
H'200–3C0* (H'700)
H'200–3C0* (H'720)
H'200–3C0* (H'800)
H'200–3C0* (H'820)
H'200–3C0* (H'840)
H'200–3C0* (H'860)
H'200–3C0* (H'900)
H'200–3C0* (H'920)
H'200–3C0* (H'940)
H'200–3C0* (H'960)
Interrupt
Priority
(Initial
Value)
16
15
0–15 (0)
0–15 (0)
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0–15 (0)
0–15 (0)
0–15 (0)
0–15 (0)
IPR (Bit
Numbers)
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
IPRD (3–0)
IPRD (7–4)
IPRD (15–12) —
IPRD (11–8)
IPRE (15–12) High
IPRE (7–4)
Priority
within IPR
Setting
Unit
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Low
High
Low
Default
Priority
High
Low