HD6417727BP100BV Renesas Electronics America, HD6417727BP100BV Datasheet - Page 735
HD6417727BP100BV
Manufacturer Part Number
HD6417727BP100BV
Description
IC SUPERH MPU ROMLESS 240BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417727BP100CV.pdf
(1098 pages)
Specifications of HD6417727BP100BV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
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- Download datasheet (7Mb)
Section 21 Analog Front End Interface (AFEIF)
5. Write “1” to DPST (ACTR2). (Start sending dial pulse)
6. After 4 digit of dial pulses are sent, interrupt is generated. (DPST is reset to “0”)
7. Set DPNQ1 → “3456H”.
8. Write “1” to DPST (ACTR2).
9. After 4 digit of dial pulses are sent, interrupt is generated. (DPST is reset to “0”)
10. Set DPNQ2 → “70XXH”.
11. Write “1” to DPST (ACTR2).
12. After 1 digit of dial pulse is sent, interrupt is generated. (DPST is reset to “0”, finish sending)
21.3.4
Wake up Ringing Interrupt
System wake up function by the ringing signal from telephone line is realized by inputting
AFE_RDET signal, that is an input signal for ringing, to PINT pin.
Rev.6.00 Mar. 27, 2009 Page 677 of 1036
REJ09B0254-0600
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