HD6417727BP100BV Renesas Electronics America, HD6417727BP100BV Datasheet - Page 19

• Manufacturer Part Number: HD6417727BP100BV
• Description: IC SUPERH MPU ROMLESS 240BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727BP100BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Section 1 Overview and Pin Functions
1.1
1.2
1.3
Section 2 CPU
2.1
2.2
2.3
2.4
2.5
2.6
Section 3 Memory Management Unit (MMU)
3.1
3.2
3.3
Features.............................................................................................................................
Block Diagram ..................................................................................................................
Pin Description..................................................................................................................
1.3.1
1.3.2
Registers............................................................................................................................ 21
2.1.1
2.1.2
2.1.3
2.1.4
Data Format ...................................................................................................................... 38
2.2.1
2.2.2
2.2.3
Features of CPU Core Instructions ................................................................................... 40
Instruction Formats ........................................................................................................... 44
2.4.1
2.4.2
2.4.3
2.4.4
Instruction Set ................................................................................................................... 64
2.5.1
DSP Extended-Function Instructions ................................................................................ 79
2.6.1
2.6.2
2.6.3
2.6.4
Overview........................................................................................................................... 97
3.1.1
3.1.2
3.1.3
3.1.4
Register Description.......................................................................................................... 103
TLB Functions .................................................................................................................. 105
Pin Arrangement ..................................................................................................
Pin Functions ....................................................................................................... 11
General Purpose Registers ................................................................................... 25
Control Registers ................................................................................................. 27
System Registers.................................................................................................. 31
DSP Registers ...................................................................................................... 31
Data Format in Registers (Non-DSP Type) ......................................................... 38
DSP-Type Data Format........................................................................................ 38
Data Format in Memory....................................................................................... 40
CPU Instruction Addressing Modes .................................................................... 44
DSP Data Addressing .......................................................................................... 48
CPU Instruction Formats ..................................................................................... 54
DSP Instruction Formats...................................................................................... 58
CPU Instruction Set ............................................................................................. 64
Introduction.......................................................................................................... 79
Added CPU System Control Instructions ............................................................ 80
Single and Double Data Transfer for DSP Data Instructions............................... 82
DSP Operation Instruction Set............................................................................. 85
Features................................................................................................................ 97
Role of MMU....................................................................................................... 97
SH7727 MMU ..................................................................................................... 99
Register Configuration......................................................................................... 103
...................................................................................................................... 21
Contents
.........................................................................
........................................................... 97
Rev.6.00 Mar. 27, 2009 Page xvii of lvi
REJ09B0254-0600
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