HD6417727BP100BV Renesas Electronics America, HD6417727BP100BV Datasheet - Page 633
HD6417727BP100BV
Manufacturer Part Number
HD6417727BP100BV
Description
IC SUPERH MPU ROMLESS 240BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417727BP100CV.pdf
(1098 pages)
Specifications of HD6417727BP100BV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
- Current page: 633 of 1098
- Download datasheet (7Mb)
Bit 5—Transmit Enable (TE): Enables or disables the SCIF serial transmitter.
Bit 5: TE
0
1
Note: * Serial transmission starts after writing of transmit data into the SCFTDR2. Select the
Bit 4—Receive Enable (RE): Enables or disables the SCIF serial receiver.
Bit 4: RE
0
1
Notes: 1. Clearing RE to 0 does not affect the receive flags (DR, ER, BRK, FER, and PER).
Bits 3 and 2—Reserved: These bits are always read as 0. The write value should always be 0.
Bits 1 and 0—Clock Enable 1 and 0 (CKE1 and CKE0): These bits should always be set to 00.
transmit format in the SCSMR2 and SCFCR2 and reset the SCFTDR2 before setting TE to
1.
2. Serial reception starts when a start bit is detected. Select the receive format in the
These flags retain their previous values.
SCSMR2 before setting RE to 1.
Description
Transmitter disabled.
Transmitter enabled. *
Description
Receiver disabled. *
Receiver enabled. *
2
1
Section 19 Serial Communication Interface with FIFO (SCIF)
Rev.6.00 Mar. 27, 2009 Page 575 of 1036
REJ09B0254-0600
(Initial value)
(Initial value)
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