HD6417727BP100BV Renesas Electronics America, HD6417727BP100BV Datasheet - Page 766
![IC SUPERH MPU ROMLESS 240BGA](/photos/28/61/286131/240-lfbga__plbg0240ja-a_sml.jpg)
HD6417727BP100BV
Manufacturer Part Number
HD6417727BP100BV
Description
IC SUPERH MPU ROMLESS 240BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417727BP100CV.pdf
(1098 pages)
Specifications of HD6417727BP100BV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
- Current page: 766 of 1098
- Download datasheet (7Mb)
Section 23 USB Function Controller
(2) Data Stage (Control-In)
Rev.6.00 Mar. 27, 2009 Page 708 of 1036
REJ09B0254-0600
Data transmission to host
(USBIFR0/EP0i TS = 1)
Set EP0i transfer-end
IN token reception
to USBTRG/EP0s
USB function
in EP0i FIFO?
Valid data
1 written
flag to 1
RDFN?
Figure 23.6 Data Stage Operation (Control-In)
Yes
Yes
ACK
NACK
NACK
No
No
Interrupt request
Write data to USBEP0i data
Clear EP0i transfer-end flag
data register (USBEPDR0i)
(USBTRG/EP0i PKTE = 1)
(USBTRG/EP0i PKTE = 1)
(USBIFR0/EP0i TS = 0)
Write data to USBEP0i
register (USBEPDR0i)
Write 1 to EP0i packet
Write 1 to EP0i packet
From setup stage
Application
enable bit
enable bit
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