HD6417727BP100BV Renesas Electronics America, HD6417727BP100BV Datasheet - Page 298

• Manufacturer Part Number: HD6417727BP100BV
• Description: IC SUPERH MPU ROMLESS 240BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727BP100BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Section 9 Power-Down Modes and Software Reset
Bit 5— Module Stop 15 (MSTP15): Specifies halting the clock supply to the AFE interface
(AFE IF). When the MSTP15 bit is set to 1, the clock supply to the AFE interface is halted.
Bit 5: MSTP15
0
1
Bit 4— Module Stop 14 (MSTP14): Specifies halting the clock supply to the USB function
module (USBF). When the MSTP14 bit is set to 1, the clock supply to the USBF is halted.
Bit 4: MSTP14
0
1
Bit 3—Module Stop 13 (MSTP13): Specifies halting the clock supply to the USB host controller
(USBH). When the MSTP13 bit is set to 1, the clock supply to the USBH is halted.
Bit 3: MSTP13
0
1
Note: This bit should not be set to 1 when MSTP14 (bit 4) is 0.
Bit 2——Reserved: This bit is always read as 0. The write value should always as 0.
Bit 1— Module Stop 11 (MSTP11): Specifies halting the clock supply LCD Controller (LCDC).
When the MSTP11 bit is set to 1, the clock supply to the LCDC is halted.
Bit 1: MSTP11
0
1
Bit 0— Module Stop 10 (MSTP10): Specifies halting the clock supply to PC Card Controller
(PCC). When the MSTP10 bit is set to 1, the clock supply to the PCC is halted.
Bit 0: MSTP10
0
1
Rev.6.00 Mar. 27, 2009 Page 240 of 1036
REJ09B0254-0600
Description
AFE interface runs
Clock supply to AFE interface halted
Description
USBF runs
Clock supply to USBF halted
Description
USBH runs
Clock supply to USBH halted
Description
LCDC runs
Clock supply to LCDC halted
Description
PCC runs
Clock supply to PCC halted
(Initial value)
(Initial value)
(Initial value)
(Initial value)
(Initial value)