HD6417727BP100BV Renesas Electronics America, HD6417727BP100BV Datasheet - Page 469
![IC SUPERH MPU ROMLESS 240BGA](/photos/28/61/286131/240-lfbga__plbg0240ja-a_sml.jpg)
HD6417727BP100BV
Manufacturer Part Number
HD6417727BP100BV
Description
IC SUPERH MPU ROMLESS 240BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417727BP100CV.pdf
(1098 pages)
Specifications of HD6417727BP100BV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
- Current page: 469 of 1098
- Download datasheet (7Mb)
DMAC indirect
address buffer
Internal data
address bus
DMAC data
D31 to D0
A25 to A0
Internal
buffer
(Transfer between External Memories, External Memory with 16-bit Width)
WEn
CSn
bus
RD
CK
Figure 14.10 Example of Transfer Timing in Indirect Address Mode
Notes: 1. The internal address bus value does not change, and controlled by the port.
Transfer source
address (H)
(1st)
Transfer source
Transfer between external memories (external memories is 16-bit bus width)
2. The DMAC does not fetch the value until 32-bit data is output to the internal
Address read cycle
address (H)
address *
Indirect
data bus.
1
Transfer source
address (L)
(2nd)
Transfer source
address (L)
address *
NOP
Indirect
Section 14 Direct Memory Access Controller (DMAC)
2
cycle
NOP
NOP
Indirect address
Rev.6.00 Mar. 27, 2009 Page 411 of 1036
Indirect
address
Indirect address
read cycle
(3rd)
Data
Transfer data
Transfer
data
Transfer data
nation address
Transfer desti-
write cycle
Data
REJ09B0254-0600
(4th)
Transfer
Transfer
data
data
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