HD6417727BP100BV Renesas Electronics America, HD6417727BP100BV Datasheet - Page 428

• Manufacturer Part Number: HD6417727BP100BV
• Description: IC SUPERH MPU ROMLESS 240BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727BP100BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Section 13 Li Bus State Controller (LBSC)
13.1.4
The bus control register 2 (BCR2) is a 16-bit read/write register that sets the bus-size width of
each area and selects whether an 8-bit port is used or not. It is initialized to H'3FF0 by a power-on
reset, but is not initialized by a manual reset or by standby mode. Do not access external memory
outside area 0 until BCR2 register initialization is complete.
Bits 15 to 8 and 5 to 0 —Not referenced
Bits 7 and 6—Area 3 Bus Size Specification (A3SZ1, A3SZ0): Specifies the bus sizes of
physical space area 3.
Bit 7: A3SZ1
0
1
0
1
Rev.6.00 Mar. 27, 2009 Page 370 of 1036
REJ09B0254-0600
Initial value:
Initial value:
Bus Control Register 2 (BCR2)
R/W:
R/W:
Bit:
Bit:
Bit 6: A3SZ0
0
1
0
1
0
1
0
1
A3SZ1
R/W
15
—
R
0
7
1
A3SZ0
R/W
14
—
R
0
6
1
A6SZ1
A2SZ1
Port A/B
Unused
Used
R/W
R/W
13
1
5
1
A6SZ0
A2SZ0
R/W
R/W
12
1
4
1
A5SZ1
R/W
11
—
R
Description
Reserved (Setting disabled)
Reserved (Setting disabled)
16-bit bus width
32-bit bus width
Reserved (Setting disabled)
Reserved (Setting disabled)
16-bit bus width
Reserved (Setting disabled)
1
3
0
A5SZ0
R/W
10
—
R
1
2
0
A4SZ1
R/W
—
R
1
0
9
1
A4SZ0
R/W
—
R
8
1
0
0