HD6417727BP100BV Renesas Electronics America, HD6417727BP100BV Datasheet - Page 605
HD6417727BP100BV
Manufacturer Part Number
HD6417727BP100BV
Description
IC SUPERH MPU ROMLESS 240BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417727BP100CV.pdf
(1098 pages)
Specifications of HD6417727BP100BV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
- Current page: 605 of 1098
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Bit 0—Smart Card Interface Mode Select (SMIF): Enables the smart card interface function.
Bit 0: SMIF
0
1
18.2.2
In the smart card interface mode, the function of SCSSR bit 4 is changed. The setting conditions
for bit 2, the TEND bit, are also changed.
Note: * Only 0 can be written, to clear the flag.
Bits 7 to 5—These bits have the same function as in the ordinary SCI. See section 17, Serial
Communication Interface (SCI), for more information.
Bit 4—Error Signal Status (ERS): In the smart card interface mode, bit 4 indicates the state of
the error signal returned from the receiving side during transmission. The smart card interface
cannot detect framing errors.
Bit 4: ERS
0
1
Note: The ERS flag maintains its state even when the TE bit in SCSCR is cleared to 0.
Initial value:
Serial Status Register (SCSSR)
R/W:
Bit:
Description
Smart card interface function disabled
Smart card interface function enabled
Description
Receiving ended normally with no error signal.
ERS is cleared to 0 when the chip is reset or enters standby mode, or when
software reads ERS after it has been set to 1, then writes 0 in ERS.
An error signal indicating a parity error was transmitted from the receiving side.
ERS is set to 1 if the error signal sampled is low.
R/(W)*
TDRE
7
1
R/(W)*
RDRF
6
0
R/(W)*
ORER FER/ERS
5
0
R/(W)*
4
0
Rev.6.00 Mar. 27, 2009 Page 547 of 1036
R/(W)*
PER
3
0
Section 18 Smart Card Interface
TEND
R
2
1
REJ09B0254-0600
MPB
R
1
0
(Initial value)
(Initial value)
MPBT
R/W
0
0
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