HD6417144F50V Renesas Electronics America, HD6417144F50V Datasheet - Page 758

• Manufacturer Part Number: HD6417144F50V
• Description: IC SUPERH MCU ROMLESS 112QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7144r

Specifications of HD6417144F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

23. Advanced User Debugger (AUD)
23.4
23.4.1
In this mode, all the modules connected to this LSI's internal or external bus can be read and
written to, allowing RAM monitoring and tuning to be carried out.
When an address is written to AUDATA externally, the data corresponding to that address is
output. If an address and data are written to AUDATA, the data is transferred to the address.
23.4.2
The AUD latches the AUDATA input when AUDSYNC is asserted. The following AUDATA
input format should be used.
Rev.4.00 Mar. 27, 2008 Page 712 of 882
REJ09B0108-0400
RAM Monitor Mode
Overview
Communication Protocol
Input format
0000
Command
Figure 23.4 AUDATA Input Format
DIR
Spare bits (4 bits): b'0000
A3 to A0
Fixed at 1
Bit 3
Address
. . . . . .
0: Read
1: Write
Bit 2
A31 to A28 D3 to D0
Bit 1
00: Byte
01: Word
10: Longword
Data (in case of write only)
Bit 0
B write: n = 7
W write: n = 15
L write: n = 31
. . . . . .
Dn to Dn-3