HD6417144F50V Renesas Electronics America, HD6417144F50V Datasheet - Page 214

IC SUPERH MCU ROMLESS 112QFP

HD6417144F50V

Manufacturer Part Number
HD6417144F50V
Description
IC SUPERH MCU ROMLESS 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Datasheet

Specifications of HD6417144F50V

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417144F50V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
10. Direct Memory Access Controller (DMAC)
Figure 10.1 is a block diagram of the DMAC.
Rev.4.00 Mar. 27, 2008 Page 168 of 882
REJ09B0108-0400
acknowledge)
On-chip ROM
On-chip RAM
External I/O
External I/O
DREQ0, DREQ1
DACK0, DACK1
DRAK0, DRAK1
peripheral
(memory
mapped)
External
External
On-chip
module
ROM
RAM
(with
SCI0, SCI1
A/D 1
DEIn
MTU
Figure 10.1 DMAC Block Diagram
Bus state
controller
DMATCRn:
Bus interface
DMAOR:
CHCRn:
Activation
DARn:
SARn:
Transfer
Register
Request
control
control
control
priority
control
count
n:
DMAC source address register
DMAC destination address register
DMAC transfer count register
DMAC channel control register
DMAC operation register
0, 1, 2, 3
DMAC module
DMATCRn
DMAOR
CHCRn
SARn
DARn

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