HD6417144F50V Renesas Electronics America, HD6417144F50V Datasheet - Page 377

IC SUPERH MCU ROMLESS 112QFP

HD6417144F50V

Manufacturer Part Number
HD6417144F50V
Description
IC SUPERH MCU ROMLESS 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Datasheet

Specifications of HD6417144F50V

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417144F50V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
11.7.14 Reset Sync PWM Mode Buffer Operation and Compare Match Flag
When setting buffer operation for reset sync PWM mode, set the BFA and BFB bits of TMDR_4
to 0. The TIOC4C pin will be unable to produce its waveform output if the BFA bit of TMDR_4 is
set to 1.
In reset sync PWM mode, the channel 3 and channel 4 buffers operate in accordance with the BFA
and BFB bit settings of TMDR_3. For example, if the BFA bit of TMDR_3 is set to 1, TGRC_3
functions as the buffer register for TGRA_3. At the same time, TGRC_4 functions as the buffer
register for TGRA_4.
The TGFC bit and TGFD bit of TSR_3 and TSR_4 are not set when TGRC_3 and TGRD_3 are
operating as buffer registers.
Figure 11.81 shows an example of operations for TGR_3, TGR_4, TIOC3, and TIOC4, with
TMDR_3’s BFA and BFB bits set to 1, and TMDR_4’s BFA and BFB bits set to 0.
TGRB_3, TGRA_4,
TGRB_4
TGRD_3, TGRC_4,
TGRD_4
TIOC3A
TIOC3B
TIOC3D
TIOC4A
TIOC4C
TIOC4B
TIOC4D
TGFC
TGFD
TGRC_3
H'0000
TGRA_3
Figure 11.81
Point b
in Reset Synchronous PWM Mode
Buffer Operation and Compare-Match Flags
Point a
Not set
TCNT3
Not set
Buffer transfer with
compare match A3
11.
Rev.4.00 Mar. 27, 2008 Page 331 of 882
Multi-Function Timer Pulse Unit (MTU)
TGRA_3,
TGRC_3
TGRB_3, TGRD_3,
TGRA_4, TGRC_4,
TGRB_4, TGRD_4
REJ09B0108-0400

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