HD6417144F50V Renesas Electronics America, HD6417144F50V Datasheet - Page 371

• Manufacturer Part Number: HD6417144F50V
• Description: IC SUPERH MCU ROMLESS 112QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7144r

Specifications of HD6417144F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

11.7.7
If a compare match occurs in the T2 state of a TGR write cycle, the data that is transferred to TGR
by the buffer operation differs depending on channel 0 and channels 3 and 4: data on channel 0 is
that after write, and on channels 3 and 4, before write.
Figures 11.74 and 11.75 show the timing in this case.
Figure 11.74
Contention between Buffer Register Write and Compare Match
Pφ
Address
Write signal
Compare
match signal
Compare match
buffer signal
Buffer register
TGR
Contention between Buffer Register Write and Compare Match (Channel 0)
N
TGR write cycle
Buffer register
T1
address
11.
T2
Rev.4.00 Mar. 27, 2008 Page 325 of 882
M
M
Multi-Function Timer Pulse Unit (MTU)
Buffer register write data
REJ09B0108-0400