HD6417144F50V Renesas Electronics America, HD6417144F50V Datasheet - Page 259

• Manufacturer Part Number: HD6417144F50V
• Description: IC SUPERH MCU ROMLESS 112QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7144r

Specifications of HD6417144F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

This LSI has an on-chip multi-function timer pulse unit (MTU) that comprises five 16-bit timer
channels.
The block diagram is shown in figure 11.1.
11.1
• Maximum 16-pulse input/output
• Selection of 8 counter input clocks for each channel
• The following operations can be set for each channel:
• Buffer operation settable for channels 0, 3, and 4
• Phase counting mode settable independently for each of channels 1 and 2
• Cascade connection operation
• Fast access via internal 16-bit bus
• 23 interrupt sources
• Automatic transfer of register data
• A/D converter conversion start trigger can be generated
• Module standby mode can be settable
• A total of six-phase waveform output, which includes complementary PWM output, and
• AC synchronous motor (brushless DC motor) drive mode using complementary PWM output
TIMMTU1A_020020030800
⎯ Waveform output at compare match
⎯ Input capture function
⎯ Counter clear operation
⎯ Multiple timer counters (TCNT) can be written to simultaneously
⎯ Simultaneous clearing by compare match and input capture is possible
⎯ Register simultaneous input/output is possible by synchronous counter operation
⎯ A maximum 12-phase PWM output is possible in combination with synchronous operation
positive and negative phases of reset PWM output by interlocking operation of channels 3 and
4, is possible.
and reset PWM output is settable by interlocking operation of channels 0, 3, and 4, and the
selection of two types of waveform outputs (chopping and level) is possible.
Section 11
Features
Multi-Function Timer Pulse Unit (MTU)
11.
Rev.4.00 Mar. 27, 2008 Page 213 of 882
Multi-Function Timer Pulse Unit (MTU)
REJ09B0108-0400