HD6417144F50V Renesas Electronics America, HD6417144F50V Datasheet - Page 422

IC SUPERH MCU ROMLESS 112QFP

HD6417144F50V

Manufacturer Part Number
HD6417144F50V
Description
IC SUPERH MCU ROMLESS 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Datasheet

Specifications of HD6417144F50V

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417144F50V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
11.
Output-Level Compare Operation:
Figure 11.116 shows an example of the output-level compare operation for the combination of
PE9/TIOC3B and PE11/TIOC3D. The operation is the same for the other pin combinations.
Rev.4.00 Mar. 27, 2008 Page 376 of 882
REJ09B0108-0400
Multi-Function Timer Pulse Unit (MTU)
Sampling
clock
POE input
PE9/
TIOC3B
When low level is
sampled at all points
When high level is
sampled at least once
Note: * Other large-current pins (PE11/TIOC3D, PE12/TIOC4A, PE13/TIOC4B/MRES, PE14/TIOC4C,
PE9/
TIOC3B
PE11/
TIOC3D
PE15/TIOC4D/IRQOUT) also go to the high-impedance state at the same timing.
Figure 11.116
Figure 11.115
1
1
8/16/128 clock
cycles
Output-Level Detection Operation
Low-Level Detection Operation
2
2
3
Low level overlapping detected
High impedance state
16
13
Flag not set
High-impedance
state*
Flag set
(POE received)

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