ATMEGA16M1-MU Atmel, ATMEGA16M1-MU Datasheet - Page 256

• Manufacturer Part Number: ATMEGA16M1-MU
• Description: IC MCU AVR 16K FLASH 32VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA16M1-MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: CAN, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -

23.3
23.4
23.4.1
256
Use of ADC Amplifiers
Register Description
ATmega16M1/32M1/64M1
AC0CON – Analog Comparator 0 Control Register
Thanks to AMPCMP0 configuration bit, Comparator 0 positive input can be connected to Ampli-
fier O output. In that case, the clock of comparator 0 is adapted to the amplifier 0 clock.
“AMP0CSR – Amplifier 0 Control and Status register” on page 247.
Thanks to AMPCMP1 configuration bit, Comparator 1 positive input can be connected to Ampli-
fier 1 output. In that case, the clock of comparator 1 is adapted to the amplifier 1 clock.
“AMP1CSR – Amplifier 1 Control and Status register” on page 248.
Thanks to AMPCMP2 configuration bit, Comparator 2 positive input can be connected to Ampli-
fier 2 output. In that case, the clock of comparator 2 is adapted to the amplifier 2 clock.
“AMP1CSR – Amplifier 1 Control and Status register” on page 248.
Each analog comparator has its own control register. A dedicated register has been designed to
consign the outputs and the flags of the 4 analog comparators.
Bit
Read/Write
Initial Value
• Bit 7 – AC0EN: Analog Comparator 0 Enable Bit
Set this bit to enable the analog comparator 0.
Clear this bit to disable the analog comparator 0.
• Bit 6 – AC0IE: Analog Comparator 0 Interrupt Enable bit
Set this bit to enable the analog comparator 0 interrupt.
Clear this bit to disable the analog comparator 0 interrupt.
• Bit 5:4 – AC0IS[1:0]: Analog Comparator 0 Interrupt Select bit
These 2 bits determine the sensitivity of the interrupt trigger.
The different setting are shown in
Table 23-1.
• Bit 3 – ACCKSEL: Analog Comparator Clock Select
Set this bit to use the PLL output as comparator clock.
Clear this bit to use the CLK
• Bit 2:0 – AC0M[2:0]: Analog Comparator 0 Multiplexer register
These 3 bits determine the input of the negative input of the analog comparator.
The different setting are shown in
AC0IS[1:0]
00
01
10
11
Interrupt sensitivity selection
AC0EN
R/W
7
0
AC0IE
R/W
6
0
IO
as comparator clock.
AC0IS1
Table
Table 23-2 on page
R/W
5
0
Comparator interrupt on output falling edge
Comparator interrupt on output rising edge
Comparator Interrupt on output toggle
23-1.
AC0IS0
R/W
4
0
Description
ACCKSEL
Reserved
R/W
3
0
257.
AC0M2
R/W
2
0
AC0M1
R/W
1
0
AC0M0
R/W
0
0
8209D–AVR–11/10
AC0CON
See
See
See