ATMEGA16M1-MU Atmel, ATMEGA16M1-MU Datasheet - Page 250

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ATMEGA16M1-MU

Manufacturer Part Number
ATMEGA16M1-MU
Description
IC MCU AVR 16K FLASH 32VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA16M1-MU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
CAN, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
250
ATmega16M1/32M1/64M1
Table 21-12. Amplifier 2 Gain Selection
To ensure an accurate result, after the gain value has been changed, the amplifier input needs
to have a quite stable input value during at least 4 Amplifier synchronization clock periods.
• Bit 3 – AMPCMP2: Amplifier 2 - Comparator 2 connection
Set this bit to connect the amplifier 2 to the comparator 2 positive input. In this configuration the
comparator clock is adapted to the amplifier clock and AMP2TS2,AMP2TS1, AMP2TS0 bits
have no effect.
Clear this bit to normally use the Amplifier 2.
• Bit 2:0 – AMP2TS[2:0]: Amplifier 2 Clock Source Selection Bits
In accordance with the
for the amplifier 1. This clock source is necessary to start the conversion on the amplified
channel.
Table 21-13. AMP1 Clock Source Selection
AMP2TS[2:0]
AMP2G[1:0]
00
01
10
11
000
001
010
011
100
101
110
111
Table
21-13, these 3 bits select the event which will generate the clock
PSC Module 0 Synchronization Signal (PSS0)
PSC Module 1 Synchronization Signal (PSS1)
PSC Module 2 Synchronization Signal (PSS2)
Timer/Counter1 Compare Match B
Timer/Counter0 Compare Match
Timer/Counter0 Overflow
Timer/Counter1 Overflow
Clock Source
Description
ADC Clock/8
Gain 10
Gain 20
Gain 40
Gain 5
8209D–AVR–11/10

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