ATMEGA16M1-MU Atmel, ATMEGA16M1-MU Datasheet - Page 190

• Manufacturer Part Number: ATMEGA16M1-MU
• Description: IC MCU AVR 16K FLASH 32VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA16M1-MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: CAN, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -

19.10.17 CANPAGE – CAN Page MOb Register
19.11 MOb Registers
19.11.1
190
ATmega16M1/32M1/64M1
CANSTMOB – CAN MOb Status Register
• Bit 3:0 – CGP[3:0]: CAN General Purpose Bits
These bits can be pre-programmed to match with the wanted configuration of the CANPAGE
register (that is, AINC and INDX2:0 setting).
• Bit 7:4 – MOBNB3:0: MOb Number
Selection of the MOb number, the available numbers are from 0 to 5.
Note:
• Bit 3 – AINC: Auto Increment of the FIFO CAN Data Buffer Index (Active Low)
• Bit 2:0 – INDX[2:0]: FIFO CAN Data Buffer Index
Byte location of the CAN data byte into the FIFO for the defined MOb.
The MOb registers has no initial (default) value after RESET.
• Bit 7 – DLCW: Data Length Code Warning
The incoming message does not have the DLC expected. Whatever the frame type, the DLC
field of the CANCDMOB register is updated by the received DLC.
• Bit 6 – TXOK: Transmit OK
This flag can generate an interrupt. It must be cleared using a read-modify-write software routine
on the whole CANSTMOB register.
The communication enabled by transmission is completed. TxOK rises at the end of EOF field.
When the controller is ready to send a frame, if two or more message objects are enabled as
producers, the lower MOb index (0 to 14) is supplied first.
• Bit 5 – RXOK: Receive OK
This flag can generate an interrupt. It must be cleared using a read-modify-write software routine
on the whole CANSTMOB register.
The communication enabled by reception is completed. RxOK rises at the end of the 6
EOF field. In case of two or more message object reception hits, the lower MOb index (0 to 14)
is updated first.
Read/Write
Initial Value
Read/Write
Initial Value
– 0 - auto increment of the index (default value)
– 1- no auto increment of the index
Bit
Bit
MOBNB3 always must be written to zero for compatibility with all AVR CAN devices
MOBNB3
DLCW
R/W
R/W
7
0
7
-
MOBNB2
TXOK
R/W
R/W
6
-
6
0
MOBNB1
RXOK
R/W
R/W
5
-
5
0
MOBNB0
BERR
R/W
R/W
4
-
4
0
SERR
R/W
AINC
R/W
3
-
3
0
CERR
R/W
INDX2
R/W
2
-
2
0
FERR
R/W
INDX1
R/W
1
-
1
0
AERR
R/W
INDX0
0
R/W
-
0
0
8209D–AVR–11/10
CANSTMOB
CANPAGE
th
bit of