ATMEGA16M1-MU Atmel, ATMEGA16M1-MU Datasheet - Page 249

• Manufacturer Part Number: ATMEGA16M1-MU
• Description: IC MCU AVR 16K FLASH 32VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA16M1-MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: CAN, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -

21.10.10 AMP2CSR – Amplifier 2 Control and Status register
8209D–AVR–11/10
• Bit 3 – AMPCMP1: Amplifier 1 - Comparator 1 connection
Set this bit to connect the amplifier 1 to the comparator 1 positive input. In this configuration the
comparator clock is adapted to the amplifier clock and AMP1TS2,AMP1TS1, AMP1TS0 bits
have no effect.
Clear this bit to normally use the Amplifier 1.
• Bit 2:0 – AMP1TS[2:0]: Amplifier 1 Clock Source Selection Bits
In accordance with the
for the amplifier 1. This clock source is necessary to start the conversion on the amplified
channel.
Table 21-11. AMP1 Clock Source Selection
Bit
Read/Write
Initial Value
• Bit 7 – AMP2EN: Amplifier 2 Enable Bit
Set this bit to enable the Amplifier 2.
Clear this bit to disable the Amplifier 2.
Clearing this bit while a conversion is running will take effect at the end of the conversion.
Warning: Always clear AMP2TS0:1 when clearing AMP2EN.
• Bit 6 – AMP2IS: Amplifier 2 Input Shunt
Set this bit to short-circuit the Amplifier 2 input.
Clear this bit to normally use the Amplifier 2.
• Bit 5:4 – AMP2G[1:0]: Amplifier 2 Gain Selection Bits
These 2 bits determine the gain of the amplifier 2.
The different setting are shown in
AMP1TS[2:0]
000
001
010
011
100
101
110
111
AMP2EN
R/W
7
0
Table
AMP2IS
R/W
6
0
21-11, these 3 bits select the event which will generate the clock
AMP2G1
Table 21-12 on page
R/W
PSC Module 0 Synchronization Signal (PSS0)
PSC Module 1 Synchronization Signal (PSS1)
PSC Module 2 Synchronization Signal (PSS2)
5
0
Timer/Counter1 Compare Match B
Timer/Counter0 Compare Match
AMP2G0
R/W
4
0
Timer/Counter0 Overflow
Timer/Counter1 Overflow
ATmega16M1/32M1/64M1
Clock Source
AMPCMP2
ADC Clock/8
R/W
3
0
250.
AMP2TS2
R/W
2
0
AMP2TS1
R/W
1
0
AMP2TS0
R/W
0
0
AMP2CSR
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