ATMEGA16M1-MU Atmel, ATMEGA16M1-MU Datasheet - Page 217

• Manufacturer Part Number: ATMEGA16M1-MU
• Description: IC MCU AVR 16K FLASH 32VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA16M1-MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: CAN, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -

20.6.2
8209D–AVR–11/10
LINSIR – LIN Status and Interrupt Register
• Bit 3 - LENA: Enable
• Bit 2:0 - LCMD[2:0]: Command and mode
The command is only available if LENA is set, and is set according to
Table 20-7.
• Bits 7:5 - LIDST[2:0]: Identifier Status
The LIN Identifier status is set according to
Table 20-8.
• Bit 4 - LBUSY: Busy Signal
• Bit 3 - LERR: Error Interrupt
Bit
Read/Write
Initial Value
LCMD[2:0]
000
001
010
011
100
11x
1x1
LIDST[2:0]
0xx
100
101
110
111
enable bit - LENERR - is set in LINENIR.
– 0 = Disable (both LIN and UART modes)
– 1 = Enable (both LIN and UART modes)
– 0 = Not busy
– 1 = Busy (receiving or transmitting)
– 0 = No error
– 1 = An error has occurred
It is a logical OR of LINERR register bits. This bit generates an interrupt if its respective
LIDST2
LIN Commanads
LIN Identifier Status
Mode
LIN Rx Header - LIN abort
LIN Tx Header
LIN Rx Response
LIN Tx Response
UART Rx & Tx Byte disable
UART Rx Byte enable
UART Tx Byte enable
Status
No specific identifier
Identifier 60 (0x3C)
Identifier 61 (0x3D)
Identifier 62 (0x3E)
Identifier 63 (0x3F)
R
7
0
LIDST1
R
6
0
LIDST0
R
5
0
LBUSY
Table
R
4
0
ATmega16M1/32M1/64M1
20-8.
R/W
LERR
3
0
one
R/W
LIDOK
2
0
one
R/W
LTXOK
Table
1
0
one
20-7.
LRXOK
R/W
0
0
one
LINSIR
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