ATMEGA16M1-MU Atmel, ATMEGA16M1-MU Datasheet - Page 181

• Manufacturer Part Number: ATMEGA16M1-MU
• Description: IC MCU AVR 16K FLASH 32VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA16M1-MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: CAN, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -

19.10.1
8209D–AVR–11/10
CANGCON – CAN General Control Register
• Bit 7 – ABRQ: Abort Request
This is not an auto resettable bit.
• Bit 6 – OVRQ: Overload Frame Request
This is not an auto resettable bit.
The overload frame can be traced observing OVFG in CANGSTA register (c.f.
page
• Bit 5 – TTC: Time Trigger Communication
• Bit 4 – SYNTTC: Synchronization of TTC
This bit is only used in TTC mode.
• Bit 3 – LISTEN: Listening Mode
• Bit 2 – TEST: Test Mode
Note:
• Bit 1 – ENA/STB: Enable / Standby Mode
Because this bit is a command and is not immediately effective, the ENFG bit in CANGSTA reg-
ister gives the true state of the chosen mode.
Initial Value
Read/Write
– 0 - no request
– 1 - abort request: a reset of CANEN1 and CANEN2 registers is done. The pending
– 0 - no request
– 1 - overload frame request: send an overload frame after the next received frame
172).
– 0 - no TTC
– 1 - TTC mode
– 0 - the TTC timer is caught on SOF
– 1 - the TTC timer is caught on the last bit of the EOF
– 0 - no listening mode
– 1 - listening mode
– 0 - no test mode
– 1 - test mode: intend for factory testing and not for customer use
Bit
communications are immediately disabled and the on-going one will be normally
terminated, setting the appropriate status flags
Note that CANCDMOB register remain unchanged
CAN may malfunction if this bit is set
ABRQ
R/W
7
0
OVRQ
R/W
6
0
TTC
R/W
5
0
SYNTTC
R/W
4
0
ATmega16M1/32M1/64M1
LISTEN
R/W
3
0
TEST
R/W
2
0
ENA/STB
R/W
1
0
SWRES
R/W
0
0
Figure 19-9 on
CANGCON
181