M306N4FGGP#U3 Renesas Electronics America, M306N4FGGP#U3 Datasheet - Page 95

• Manufacturer Part Number: M306N4FGGP#U3
• Description: IC M16C/6N4 MCU FLASH 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/6Nr

Specifications of M306N4FGGP#U3

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100LQFP
• Family Name: M16C
• Maximum Speed: 24 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 87
• Interface Type: I2C/UART
• On-chip Adc: 26-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 11
• For Use With: R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
Table 8.8 Allowed Transition and Setting
-: Cannot transit
NOTES:
1. Avoid making a transition when the CM20 bit is set to 1 (oscillation
2. On-chip oscillator clock oscillates and stops in low-speed mode. In this
3. PLL operating mode can only be entered from and changed to high-speed
4. Set the CM06 bit to 1 (divide-by-8 mode) before transiting from on-chip
5. When exiting stop mode, the CM06 bit is set to 1 (divide-by-8 mode).
6. If the CM05 bit is set to 1 (main clock stop), then the CM06 bit is set to 1
7. A transition can be made only when sub clock is oscillating.
8. State transitions within the same mode (divide-by-n values changed or sub
9. ( ):setting method. See right table.
stop, re-oscillation detection function enabled). Set the CM20 bit to 0 (oscillation
stop, re-oscillation detection function disabled) before transiting.
mode, the on-chip oscillator can be used as peripheral function clock. Sub
clock oscillates and stops in PLL operating mode. In this mode, sub clock
can be used as peripheral function clock.
mode.
oscillator mode to high-speed or medium-speed mode.
(divide-by-8 mode).
clock oscillation turned on or off) are shown in the table below.
No division
Divide-by-2 (3)
Divide-by-4 (3)
Divide-by-8 (3)
Divide-by-16 (3)
No division (2)
Divide-by-2
Divide-by-4
Divide-by-8
Divide-by-16
High-speed mode,
medium-speed mode
Low-speed
mode
Low power
dissipation mode
PLL operating
mode
On-chip oscillator
mode
On-chip oscillator low
power dissipation mode
Stop mode
Wait mode
Apr 14, 2006
(2)
(2)
Division by-2 by-4 by-8 by-16 Division by-2 by-4 by-8 by-16
No Divide- Divide- Divide- Divide- No Divide- Divide- Divide- Divide-
-
-
-
-
Sub Clock Oscillating
(4)
(4)
(4)
(4)
(2)
page 71 of 376
-
-
-
-
High-Speed Mode, Low-Speed Low Power PLL Operating On-chip Oscillator On-chip Oscillator
(NOTE 8)
Medium-Speed
(5)
(5)
(5)
(5)
(2)
-
-
-
-
(12)
(14)
(18)
(18)
Mode
(8)
-
-
(7)
(7)
(7)
(7)
(2)
-
-
-
-
(3)
(4)
(5)
(6)
(6)
(6)
(6)
(2)
Mode
-
-
-
-
(10)
(18)
(18)
(9)
-
-
-
(1)
(3)
(3)
(3)
(3)
(7)
-
-
-
-
(2)
Sub Clock Turned Off
(9)
Dissipation Mode Mode (2)
(1)
(4)
(4)
(4)
(4)
(11)
-
-
-
-
(18)
(18)
-
-
-
-
(1) (6)
(5)
(5)
(1)
(5)
(5)
-
-
-
-
State after Transition
(1)
(7)
(7)
(7)
(7)
-
-
-
-
(13)
-
-
-
-
-
-
(1)
(6)
(6)
(6)
(6)
-
-
-
-
(3)
(NOTE 8)
CM04, CM05, CM06, CM07: Bits in CM0 register
CM10, CM11, CM16, CM17: Bits in CM1 register
CM20, CM21
PLC07
Mode
(1) CM04=0
(2) CM04=1
( 3) CM06=0
( 4) CM06=0
( 5) CM06=0
( 6) CM06=0
(7) CM06=1
(8) CM07=0
(10) CM05=0
(11) CM05=1
(12) PLC07=0
( 13) PLC07=1
(14) CM21=0
( 15) CM21=1
(16) CM10=1
(17) WAIT
(18) Hardware
(9) CM07=1
(18)
(15)
(10)
(18)
-
-
-
CM17=0
CM16=0
CM17=0
CM16=1
CM17=1
CM16=0
CM17=1
CM16=1
CM11=0
CM11=1
instruction
interrupt
Setting
(5)
Dissipation Mode
(NOTE 8)
Low Power
(11)
(18)
(18)
-
-
-
-
8. Clock Generation Circuit
(1)
(5)
Sub clock turned off
Sub clock oscillating
CPU clock no division
mode
CPU clock divide-by-2
mode
CPU clock divide-by-4
mode
CPU clock divide-by-16
mode
CPU clock divide-by-8 mode
Main clock, PLL clock
or on-chip oscillator
clock selected
Sub clock selected
Main clock oscillating
Main clock turned off
Main clock selected
PLL clock selected
Main clock or
PLL clock selected
On-chip oscillator clock
selected
Transition to stop mode
Transition to wait mode
Exit stop mode or wait
mode
Mode
(16)
(16)
(16)
(16)
(16)
Stop
: Bits in CM2 register
: Bit in PLC0 register
-
-
Operation
(1)
(1)
(1)
(1)
(1)
Mode
Wait
(17)
(17)
(17)
(17)
(17)
-
-