M306N4FGGP#U3 Renesas Electronics America, M306N4FGGP#U3 Datasheet - Page 225

• Manufacturer Part Number: M306N4FGGP#U3
• Description: IC M16C/6N4 MCU FLASH 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/6Nr

Specifications of M306N4FGGP#U3

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100LQFP
• Family Name: M16C
• Maximum Speed: 24 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 87
• Interface Type: I2C/UART
• On-chip Adc: 26-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 11
• For Use With: R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
Table 16.4 Single Sweep Mode Specifications
NOTE:
Function
A/D conversion
start condition
A/D conversion
stop condition
Interrupt request
generation timing
Analog input pin
Reading of result of
A/D converter
16.1.3 Single Sweep Mode
In single sweep mode, analog voltage that is applied to selected pins is converted one-by-one to a digital
code. Table 16.4 lists the Single Sweep Mode Specifications. Figure 16.6 shows Registers ADCON0 and
ADCON1 in Single Sweep Mode.
1. AN0_0 to AN0_7, and AN2_0 to AN2_7 can be used in the same way as AN0 to AN7.
Apr 14, 2006
Item
page 201 of 376
Bits SCAN1 to SCAN0 in the ADCON1 register and bits ADGSEL1 to ADGSEL0
in the ADCON2 register select pins. Analog voltage applied to this pins is
converted one-by-one to a digital code.
• When the TRG bit in the ADCON0 register is 0 (software trigger)
• When the TRG bit is 1 (ADTRG trigger)
• Completion of A/D conversion (If a software trigger is selected, the ADST
• Set the ADST bit to 0
Completion of A/D conversion
Select from AN0 to AN1 (2 pins), AN0 to AN3 (4 pins), AN0 to AN5 (6 pins),
AN0 to AN7 (8 pins)
Read one of registers AD0 to AD7 that corresponds to the selected pin
The ADST bit in the ADCON0 register is set to 1 (A/D conversion starts)
Input on the ADTRG pin changes state from high to low after the ADST
bit is set to 1 (A/D conversion starts)
bit is set to 0 (A/D conversion halted).)
_____________
(1)
_____________
Specification
16. A/D Converter