M306N4FGGP#U3 Renesas Electronics America, M306N4FGGP#U3 Datasheet - Page 168
M306N4FGGP#U3
Manufacturer Part Number
M306N4FGGP#U3
Description
IC M16C/6N4 MCU FLASH 100-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Specifications of M306N4FGGP#U3
Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Package
100LQFP
Family Name
M16C
Maximum Speed
24 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
87
Interface Type
I2C/UART
On-chip Adc
26-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
11
For Use With
R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
Figure 15.4 UARTi Transmit/Receive Unit
RXDi
i = 0 to 2
SP: Stop bit
PAR: Parity bit
SMD2 to SMD0, STPS, PRYE, IOPOL, CKDIR: Bits in UiMR register
CLK1 to CLK0, CKPOL, CRD, CRS: Bits in UiC0 register
UiERE: Bit in UiC1 register
Apr 14, 2006
SP
SP
reverse circuit
SP
RXD data
STPS
1SP
2SP
0
1
STPS
2SP
1SP
0
1
0
SP
page 144 of 376
0
PAR
0
1
PAR
IOPOL
No reverse
Reverse
PRYE
PAR
enabled
0
PAR
disabled
1
0
PAR
enabled
PRYE
1
0
PAR
disabled
0
SMD2 to SMD0
SMD2 to SMD0
UART
0
Clock
synchronous
type
UART
Clock
synchronous
type
1
0
0
1
0
UART
(9 bits)
0
UART
(9 bits)
0
UART
(7 bits)
UART
(8 bits)
1
Clock
synchronous type
1
Clock
synchronous type
UART
(7 bits)
UART
(8 bits)
D8
0
Data bus high-order bits
Data bus low-order bits
D8
UART
(8 bits)
UART
(9 bits)
Clock
synchronous type
Clock
synchronous type
UART
(8 bits)
UART
(9 bits)
1
UART(7 bits)
0
0
D7 D6 D5
Logic reverse circuit + MSB/LSB conversion circuit
Logic reverse circuit + MSB/LSB conversion circuit
D7 D6 D5
1
UART(7 bits)
UiERE
Error signal output
enable
Error signal output
disable
0
1
output circuit
Error signal
UARTi receive register
D4 D3
D4 D3 D2
UARTi transmit register
IOPOL
0
1
Reverse
D2 D1 D0
No reverse
reverse circuit
TXD data
D1 D0
15. Serial Interface
UiTB register
TXDi
UiRB register
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