M306N4FGGP#U3 Renesas Electronics America, M306N4FGGP#U3 Datasheet - Page 239

IC M16C/6N4 MCU FLASH 100-LQFP

M306N4FGGP#U3

Manufacturer Part Number
M306N4FGGP#U3
Description
IC M16C/6N4 MCU FLASH 100-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Datasheets

Specifications of M306N4FGGP#U3

Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Package
100LQFP
Family Name
M16C
Maximum Speed
24 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
87
Interface Type
I2C/UART
On-chip Adc
26-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
11
For Use With
R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
19.1 CAN Module-Related Registers
The CANi (i = 0, 1) module has the following registers.
19.1.1 CANi Message Box (i = 0, 1)
19.1.2 Acceptance Mask Registers
19.1.3 CAN SFR Registers
Explanation of each register is given below.
A CAN module is equipped with 16 slots (16 bytes or 8 words each). Slots 14 and 15 can be used as
Basic CAN.
• Priority of the slots: The smaller the number of the slot, the higher the priority, in both transmission and
• A program can define whether a slot is defined as transmitter or receiver.
A CAN module is equipped with 3 masks for the acceptance filter.
• CANi global mask register (i = 0, 1) (CiGMR register: 6 bytes)
• CANi local mask A register (CiLMAR register: 6 bytes)
• CANi local mask B register (CiLMBR register: 6 bytes)
• CANi message control register j (i = 0, 1, j = 0 to 15) (CiMCTLj register: 8 bits ✕ 16)
• CANi control register (CiCTLR register: 16 bits)
• CANi status register (CiSTR register: 16 bits)
• CANi slot status register (CiSSTR register: 16 bits)
• CANi interrupt control register (CiICR register: 16 bits)
• CANi extended ID register (CiIDR register: 16 bits)
• CANi configuration register (CiCONR register: 16 bits)
• CANi receive error count register (CiRECR register: 8 bits)
• CANi transmit error count register (CiTECR register: 8 bits)
• CANi time stamp register (CiTSR register: 16 bits)
• CANi acceptance filter support register (CiAFS register: 16 bits)
reception.
Configuration of the masking condition for acceptance filtering processing to slots 0 to 13
Configuration of the masking condition for acceptance filtering processing to slot 14
Configuration of the masking condition for acceptance filtering processing to slot 15
Control of transmission and reception of a corresponding slot
Control of the CAN protocol
Indication of the protocol status
Indication of the status of contents of each slot
Selection of “interrupt enabled or disabled” for each slot
Selection of ID format (standard or extended) for each slot
Configuration of the bus timing
Indication of the error status of the CAN module in reception: the counter value is incremented or
decremented according to the error occurrence.
Indication of the error status of the CAN module in transmission: the counter value is incremented or
decremented according to the error occurrence.
Indication of the value of the time stamp counter
Decoding the received ID for use by the acceptance filter support unit
Apr 14, 2006
page 215 of 376
19. CAN Module

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