M306N4FGGP#U3 Renesas Electronics America, M306N4FGGP#U3 Datasheet - Page 67

IC M16C/6N4 MCU FLASH 100-LQFP

M306N4FGGP#U3

Manufacturer Part Number
M306N4FGGP#U3
Description
IC M16C/6N4 MCU FLASH 100-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Datasheets

Specifications of M306N4FGGP#U3

Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Package
100LQFP
Family Name
M16C
Maximum Speed
24 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
87
Interface Type
I2C/UART
On-chip Adc
26-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
11
For Use With
R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
Table 7.3 Operation of RD, WRL, and WRH Signals
Table 7.4 Operation of RD, WR, and BHE Signals
Figure 7.3 ALE Signal, Address Bus, and Data Bus
Data Bus Width
Data Bus Width
16 bits
(BYTE pin
16 bits
(BYTE pin
8 bits
(BYTE pin input = H)
7.2.4 Read and Write Signals
7.2.5 ALE Signal
When the data bus is 16-bit width, the read and write signals can be chosen to be a combination of RD,
______
WR, and BHE or a combination of RD, WRL, and WRH by using the PM02 bit in the PM0 register. When
the data bus is 8-bit width, use a combination of RD, WR, and BHE.
Table 7.3 shows the Operation of RD, WRL, and WRH Signals. Table 7.4 shows the Operation of RD,
______
WR, and BHE Signals.
The ALE signal latches the address when accessing the multiplexed bus space. Latch the address when
the ALE signal falls.
Figure 7.3 shows the ALE Signal, Address Bus and Data Bus.
A0/D0 to A7/D7
input = L)
input = L)
NOTE:
When BYTE pin input = H
Apr 14, 2006
A8 to A19
1. If the entire CS space is assigned a multiplexed bus, these pins function as I/O ports.
________
________
ALE
_____
RD
page 43 of 376
H
H
H
H
L
L
L
L
RD
_____
Address
H
H
H
L
_____
_____
________
______
Address
______
WR
H
H
H
H
L
L
L
L
________
WRL
_____
_____
H
H
L
L
(1)
________
Not used
Not used
Data
_________
________
BHE
________
________
H
H
L
L
L
L
_________
WRH
_____
H to L
H to L
H
H
________
L
L
_________
A0
A1/D0 to A8/D7
H
H
L
L
L
L
______
When BYTE pin input = L
A9 to A19
Read data
Write 1 byte of data to an even address
Write 1 byte of data to an odd address
Write data to both even and odd addresses
Write 1 byte of data to an odd address
Read 1 byte of data from an odd address
Write 1 byte of data to an even address
Read 1 byte of data from an even address
Write data to both even and odd addresses
Read data from both even and odd addresses
Write 1 byte of data
Read 1 byte of data
ALE
A0
________
Status of External Data Bus
Status of External Data Bus
Address
Address
Address
Data
_____
_____
7. Bus

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