M306N4FGGP#U3 Renesas Electronics America, M306N4FGGP#U3 Datasheet - Page 92

• Manufacturer Part Number: M306N4FGGP#U3
• Description: IC M16C/6N4 MCU FLASH 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/6Nr

Specifications of M306N4FGGP#U3

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100LQFP
• Family Name: M16C
• Maximum Speed: 24 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 87
• Interface Type: I2C/UART
• On-chip Adc: 26-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 11
• For Use With: R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
8.4.3.3 Exiting Stop Mode
Stop mode is exited by a hardware reset, NMI interrupt or peripheral function interrupt.
When the hardware reset or NMI interrupt is used to exit stop mode, set all ILVL2 to ILVL0 bits in the
interrupt control registers for the peripheral function interrupt to 000b (interrupt disabled) before setting
the CM10 bit in the CM1 register to 1.
When the peripheral function interrupt is used to exit stop mode, set the CM10 bit to 1 after the following
settings are completed.
(1) Set bits ILVL2 to ILVL0 in the interrupt control registers to decide the peripheral priority level of the
(2) Set the I flag to 1.
(3) Start operation of peripheral function being used to exit wait mode.
When stop mode is exited by the peripheral function interrupt or NMI interrupt, the CPU clock source is
as follows, in accordance with the CPU clock source setting before the MCU had entered stop mode.
• When the sub clock is the CPU clock before entering stop mode: Sub clock
• When the main clock is the CPU clock source before entering stop mode:
• When the on-chip oscillator clock is the CPU clock source before entering stop mode:
Apr 14, 2006
peripheral function interrupt.
Set the interrupt priority levels of the interrupts, not being used to exit stop mode, to 0 by setting the
all ILVL2 to ILVL0 bits to 000b (interrupt disabled).
When exiting stop mode by the peripheral function interrupt, the interrupt routine is performed when
an interrupt request is generated and the CPU clock is supplied again.
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On-chip oscillator clock divided by 8
Main clock divided by 8
8. Clock Generation Circuit