M306N4FGGP#U3 Renesas Electronics America, M306N4FGGP#U3 Datasheet - Page 105

• Manufacturer Part Number: M306N4FGGP#U3
• Description: IC M16C/6N4 MCU FLASH 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/6Nr

Specifications of M306N4FGGP#U3

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100LQFP
• Family Name: M16C
• Maximum Speed: 24 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 87
• Interface Type: I2C/UART
• On-chip Adc: 26-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 11
• For Use With: R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
Figure 10.4 Interrupt Control Registers (2)
Interrupt Control Register
NOTES:
b7
1. To rewrite the interrupt control registers, do so at a point that does not generate the interrupt request for that
2. When the BYTE pin is low and the processor mode is memory expansion or microprocessor mode, set bits
3. This bit can only be reset by writing 0 (do not write 1).
4. If bits IFSR10 to IFSR15 in the IFSR1 register are 1 (both edges), set the POL bit in registers INT0IC to INT5IC
5. Set the POL bit in the S3IC register to 0 (falling edge) when the IFSR00 bit in the IFSR0 register = 1 and the
6. Use the IFSR17 bit in the IFSR1 register to select.
7. Use the IFSR16 bit in the IFSR1 register and the IFSR00 bit in the IFSR0 register to select.
Apr 14, 2006
b6
register. For details, refer to 23.6 Interrupts.
ILVL2 to ILVL0 in registers INT5IC to INT3IC to 000b (interrupt disabled).
to 0 (falling edge).
IFSR16 bit in the IFSR1 register = 0 (SI/O3 selected).
b5
0
b4
b3
b2
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b1
b0
Bit Symbol
(b7-b6)
ILVL0
ILVL1
ILVL2
POL
(b5)
IR
(1)
-
-
INT3IC
C1RECIC/INT5IC
C1TRMIC/S3IC/INT4IC
INT0IC to INT2IC
Interrupt priority level
select bits
Interrupt request bit
Polarity select bit
Reserved bit
Nothing is assigned. If necessary, set to 0.
When read, the content is undefined.
(2)
Symbol
Bit Name
(2) (6)
(2) (7)
0044h
0048h
0049h
005Dh to 005Fh
b2 b1 b0
Address
0 0 0 : Level 0 (interrupt disabled)
0 0 1 : Level 1
0 1 0 : Level 2
0 1 1 : Level 3
1 0 0 : Level 4
1 0 1 : Level 5
1 1 0 : Level 6
1 1 1 : Level 7
0 : Interrupt not requested
1 : Interrupt requested
0 : Selects falling edge
1 : Selects rising edge
Set to 0
Function
XX00X000b
XX00X000b
XX00X000b
XX00X000b
After Reset
(4) (5)
10. Interrupts
RW
RW
RW
RW
RW
RW
RW
-
(3)