MC9S12NE64VTU Freescale Semiconductor, MC9S12NE64VTU Datasheet - Page 58

• Manufacturer Part Number: MC9S12NE64VTU
• Description: IC MCU 25MHZ ETHERNET/PHY 80TQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12NE64VTU

• Mfg Application Notes: MC9S12NE64 Integrated Ethernet Controller Implementing an Ethernet Interface with the MC9S12NE64 Web Server Development with MC9S12NE64 and Open TCP
• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 38
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.375 V ~ 3.465 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 80-TQFP Exposed Pad, 80-eTQFP, 80-HTQFP, 80-VQFP
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 16 bit
• Operating Supply Voltage: - 0.3 V to + 3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 65 C
• On-chip Adc: 10 bit
• For Use With: EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Chapter 1 MC9S12NE64 Device Overview
1.2.4.8
V
1.2.4.9
Provides operating voltage and ground for the oscillator and the phase-locked loop. This allows the supply
voltage to the oscillator and PLL to be bypassed independently. This 2.5 V voltage is generated by the
internal voltage regulator. The internal voltage regulator is turned off, if V
58
RH
and V
V
PHY_VDDRX
RL
PHY_VDDTX
PHY_VSSRX
PHY_VSSTX
Mnemonic
PHY_VDDA
PHY_VSSA
DDR
V
V
V
V
RH
DDPLL
V
V
are the reference voltage input pins for the analog-to-digital converter.
V
V
V
V
V
V
V
All V
signal transitions place high, short-duration current demands on the power
supply, use bypass capacitors with high-frequency characteristics and place
them as near to the MCU as possible. Bypass requirements depend on MCU
pin load.
V
V
DDPLL
SSPLL
V
DDX1
DDX2
/V
SSX1
SSX2
DDA
SSA
DD1
DD2
SS1
SS2
RH
RL
REGEN
, V
Table 1-5. MC9S12NE64 Power and Ground Connection Summary
SS
RL
, V
pins must be connected together in the application. Because fast
— ATD Reference Voltage Input Pins
SSPLL
Nominal
Voltage
3.3 V
3.3 V
3.3 V
3.3 V
2.5 V
2.5 V
2.5 V
0 V
0 V
0 V
0 V
0 V
0V
— Power Supply Pins for PLL
External power and ground, supply to internal voltage regulator.
To disable voltage regulator attach V
External power and ground, supply to pin drivers.
Operating voltage and ground for the analog-to-digital converter, the
reference for the internal voltage regulator and the digital-to-analog
converters, allows the supply voltage to the A/D to be bypassed
independently.
Reference voltage high for the analog-to-digital converter.
Reference voltage low for the analog-to-digital converter.
Internal power and ground generated by internal regulator for internal
Ethernet Physical Transceiver (EPHY). These also allow an external
source to supply the EPHY voltages and bypass the internal voltage
regulator.
Internal power and ground generated by internal regulator. These also
allow an external source to supply the core V
bypass the internal voltage regulator.
Provide operating voltage and ground for the phase-locked loop. This
allows the supply voltage to the PLL to be bypassed independently.
Internal power and ground generated by internal regulator.
MC9S12NE64 Data Sheet, Rev 1.0
NOTE
Description
REGEN
to V
DDR
DD
SSX
/V
SS
/V
.
REGEN
voltages and
Freescale Semiconductor
is tied to ground.