MC9S12NE64VTU Freescale Semiconductor, MC9S12NE64VTU Datasheet - Page 188

IC MCU 25MHZ ETHERNET/PHY 80TQFP

MC9S12NE64VTU

Manufacturer Part Number
MC9S12NE64VTU
Description
IC MCU 25MHZ ETHERNET/PHY 80TQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12NE64VTU

Mfg Application Notes
MC9S12NE64 Integrated Ethernet Controller Implementing an Ethernet Interface with the MC9S12NE64 Web Server Development with MC9S12NE64 and Open TCP
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, Ethernet, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
38
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.375 V ~ 3.465 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
80-TQFP Exposed Pad, 80-eTQFP, 80-HTQFP, 80-VQFP
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
70
Number Of Timers
16 bit
Operating Supply Voltage
- 0.3 V to + 3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 65 C
On-chip Adc
10 bit
For Use With
EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Chapter 6 Timer Module (TIM16B4CV1)
6.3.2.1
Read: Anytime
Write: Anytime
6.3.2.2
Read: Anytime but will always return 0x0000 (1 state is transient)
Write: Anytime
188
FOC[7:4]
IOS[7:4]
Reset
Reset
Field
Field
7:4
7:4
W
W
R
R
FOC7
IOS7
Input Capture or Output Compare Channel Configuration
0 The corresponding channel acts as an input capture.
1 The corresponding channel acts as an output compare.
Force Output Compare Action for Channel 7:4 — A write to this register with the corresponding data bit(s) set
causes the action which is programmed for output compare “x” to occur immediately. The action taken is the
same as if a successful comparison had just taken place with the TCx register except the interrupt flag does not
get set.
Note: A successful channel 7 output compare overrides any channel 6:4 compares. If forced output compare on
Timer Input Capture/Output Compare Select (TIOS)
Timer Compare Force Register (CFORC)
0
0
0
7
7
any channel occurs at the same time as the successful output compare then forced output compare action
will take precedence and interrupt flag won’t get set.
Figure 6-6. Timer Input Capture/Output Compare Select (TIOS)
FOC6
IOS6
0
0
0
6
6
Figure 6-7. Timer Compare Force Register (CFORC)
Table 6-3. CFORC Field Descriptions
Table 6-2. TIOS Field Descriptions
FOC5
IOS5
MC9S12NE64 Data Sheet, Rev. 1.1
0
0
0
5
5
FOC4
IOS4
0
0
0
4
4
Description
Description
0
0
0
0
3
3
0
0
0
0
2
2
Freescale Semiconductor
0
0
0
0
1
1
0
0
0
0
0
0

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