MC9S12NE64VTU Freescale Semiconductor, MC9S12NE64VTU Datasheet - Page 379

• Manufacturer Part Number: MC9S12NE64VTU
• Description: IC MCU 25MHZ ETHERNET/PHY 80TQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12NE64VTU

• Mfg Application Notes: MC9S12NE64 Integrated Ethernet Controller Implementing an Ethernet Interface with the MC9S12NE64 Web Server Development with MC9S12NE64 and Open TCP
• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 38
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.375 V ~ 3.465 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 80-TQFP Exposed Pad, 80-eTQFP, 80-HTQFP, 80-VQFP
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 16 bit
• Operating Supply Voltage: - 0.3 V to + 3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 65 C
• On-chip Adc: 10 bit
• For Use With: EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Chapter 13
Penta Output Voltage Regulator (VREGPHYV1)
13.1 Introduction
13.1.1 Overview
Block VREG_PHY is a penta output voltage regulator providing five separate 2.5V (typ) supplies
differing in the amount of current that can be sourced. The regulator input voltage is 3.3V+/-10% .
13.1.2 Features
The block VREG_PHY includes these distinctive features:
13.1.3 Modes of Operation
There are three modes VREG_PHY can operate in:
Freescale Semiconductor
• Five parallel, linear voltage regulators
• Power On Reset (POR)
• Low Voltage Reset (LVR)
• Full Performance Mode (FPM) (CPU is not in Stop Mode)
• Reduced Power Mode (RPM) (CPU is in Stop Mode)
• Shutdown Mode
— Bandgap reference
The regulator is active, providing the nominal supply voltage of 2.5V with full current
sourcing capability at all outputs. Features LVR (Low Voltage Reset) and POR (Power-On
Reset) are available.
The purpose is to reduce power consumption of the device. The output voltage may degrade
to a lower value than in Full Performance Mode, additionally the current sourcing
capability is substantially reduced. Only the POR is available in this mode, LVR are
disabled.
Controlled by VREGEN (see device level specification for connectivity of VREGEN).
This mode is characterized by minimum power consumption. The regulator outputs are in
a high impedance state, only the POR feature is available, LVR is disabled.
This mode must be used to disable the chip internal regulator VREG_PHY, i.e. to bypass
the VREG_PHY to use external supplies.
MC9S12NE64 Data Sheet, Rev. 1.1
379