T-8110L AGERE [Agere Systems], T-8110L Datasheet - Page 83

• Manufacturer Part Number: T-8110L
• Manufacturer: AGERE [Agere Systems]

February 2004
Agere Systems Inc.
8 General-Purpose I/O
8.2 GP Circuit Operation
8.2.1 GPIO General-Purpose Bits
Any of the T8110L GP signals may be used as general-purpose I/O bits. Each GP bit used as GPIO is configured
by setting the direction via the appropriate bits in the GPIO R/W register. For write access to the GPIO, the GPIO
data register is used to hold data for output to the GP pin(s). Read accesses are maskable via the GPIO read mask
register. For read access from the GPIO, the logical state of the GP[7:0] signals is returned if unmasked. If a GPIO
bit is masked, a read access returns 0.
8.2.2 GP Dual-Purpose Bits GPIO (Override)
8.2.2.1 GP H.110 Clock Master Indicators (GP0, GP1 Only)
An additional function is provided for GP0 and GP1 only, controlled via the GPIO override register.
GP0 may be used as a dedicated output (set GPIO override register bit 0), which transmits the state of the T8110L
A clock master enable (register 0x00220, bit 4). This output is intended to drive the external A clock FETs required
for H.110 bus mastering.
GP1 may be used as a dedicated output (set GPIO override register bit 1), which transmits the state of the T8110L
B clock master enable (register 0x00220, bit 5). This output is intended to drive the external B clock FETs required
for H.110 bus mastering.
8.2.3 GP External Interrupts
Any of the T8110L GP signals may be used as externally sourced inputs into the interrupt controller logic. Each GP
bit used as an interrupt input must be shut off by setting the appropriate GPIO R/W register bit to be input. The
interrupt control registers (0x00604—607) control how the GP inputs are handled. For more details, see Section
10.1 on page 90.
8.2.4 GP Diagnostic Test Point Observation
Any of the T8110L GP signals may be used to observe a predefined set of internal testpoints. Each GP bit used as
a testpoint output is enabled via diagnostic register 0x00142, GP testpoint enable. Settings in this register override
the GPIO R/W register and force the selected bits to be testpoint outputs (refer to Section 11.1 on page 106, and
Table 90 on page 108).
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Ambassador T8110L H.100/H.110 Switch
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