T-8110L AGERE [Agere Systems], T-8110L Datasheet - Page 100

• Manufacturer Part Number: T-8110L
• Manufacturer: AGERE [Agere Systems]

Ambassador T8110L H.100/H.110 Switch
10 Error Reporting and Interrupt Control
10.1 Interrupt Control Registers
10.1.9 Interrupt Servicing Registers (continued)
10.1.9.2 SYSERR and CLKERR Output Select Register (continued)
Table 85. SYSERR Output Select Registers
*
100
Address
0x00612 SYSERR Output Select
0x00616 SYSERR Pulse Width
0x00613 CLKERR Output Select
0x00617 CLKERR Pulse Width
When the arbitration control is disabled (0x00610 = 0000 0000), SYSERR or CLKERR levels remain asserted until all the internal system (or
clock) pending bits are cleared.
Byte
Name
Bit(s) Mnemonic
7:0
7:0
7:0
7:0
(continued)
JCWSR
JSWSR
JSOSR
JCOSR
(continued)
0000 0000
0000 0001
0001 0000
0001 0001
LLLL LLLL SYSERR pulse-width value.
0000 0000
0000 0001
0001 0000
0001 0001
LLLL LLLL CLKERR pulse-width value.
Value
SYSERR is active-high level* (default).
SYSERR is active-low level*.
SYSERR is active-high single pulse.
SYSERR is active-low single pulse.
CLKERR is active-high level* (default).
CLKERR is active-low level*.
CLKERR is active-high single pulse.
CLKERR is active-low single pulse.
Function
Agere Systems Inc.
February 2004