T-8110L AGERE [Agere Systems], T-8110L Datasheet - Page 80

• Manufacturer Part Number: T-8110L
• Manufacturer: AGERE [Agere Systems]

Ambassador T8110L H.100/H.110 Switch
8 General-Purpose I/O
There are eight independent T8110L GPIO signals, GP[7:0]. These pins behave as general-purpose register bits,
with programmable direction (in or out) and read masking. The GP0 and GP1 signals allow for an additional mode
of operation, providing dedicated output signals to indicate A clock and B clock mastering for H.110 bus applica-
tions.
8.1 GPIO Control Registers
Table 65. GPIO Register
8.1.1 GPIO Data Register
The GPIO data register provides read/write access and write storage to/from any GP signals being used as gen-
eral-purpose register bits. Reads from GPIO are maskable, controlled via register 0x00501.
Table 66. GPIO Data Register
80
DWORD Address
Address
0x00500 GPIO Data Register
Byte
(20 bits)
0x00500
Name
GPIO override
Byte 3
Bit(s)
7
6
5
4
3
2
1
0
GPIO R/W
Mnemonic
Byte 2
G7IOB
G6IOB
G5IOB
G4IOB
G3IOB
G2IOB
G1IOB
G0IOB
Register
Value
L
L
L
L
L
L
L
L
GPIO read mask
Byte 1
GPIO bit 7 value.
GPIO bit 6 value.
GPIO bit 5 value.
GPIO bit 4 value.
GPIO bit 3 value.
GPIO bit 2 value.
GPIO bit 1 value.
GPIO bit 0 value.
Function
GPIO data register
Agere Systems Inc.
February 2004
Byte 0