T-8110L AGERE [Agere Systems], T-8110L Datasheet - Page 21
T-8110L
Manufacturer Part Number
T-8110L
Description
Manufacturer
AGERE [Agere Systems]
Datasheet
1.T-8110L.pdf
(164 pages)
- Current page: 21 of 164
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February 2004
Agere Systems Inc.
3 Main Architectural Features
3.1 T8110L Architecture
The T8110L includes all of the clocking and standard switching functions found on previous Ambassador devices,
plus additional functionalities that are described in the following sections. The T8110L interfaces to a controller via
a standard microprocessor interface which is described in Section 4. Note that the full version of the device, the
T8110, contains both microprocessor and PCI interfaces, allowing the device to attach directly to a PCI bus. The
T8110L and T8110 are pin compatible.
FRAME
GROUPS
AND GP I/O
GENERAL-
PURPOSE
SIGNALS
ERROR
I/O
ADDITIONAL
INTERRUPT
GENERAL-
CONTROL
PURPOSE
GROUPS
FRAME
ERROR
AND
I/O
I/O
ADDRESS
DATA
ERRORS
TIMING
SYSTEM
FG
CLOCK
ERRORS
CLOCKS
LOCAL
REGISTER
CONTROL
AND TIMING
ACCESS
CLOCKING
CONTROL
Figure 2. T8110L Architecture Block Diagram
MICROPROCESSOR INTERFACE
CLOCKS
H1x0
CONTROLLER
CONNECTION
CONNECTION
CONNECTION
CONNECTION
CONNECTION
LOCAL HIGH
LOCAL LOW
H1x0 EVEN
H1x0 ODD
MEMORY
MEMORY
MEMORY
MEMORY
MEMORY
Ambassador T8110L H.100/H.110 Switch
CONTROLLER
MEMORY
MEMORY
MEMORY
2K x 8
2K x 8
DATA
DATA
DATA
(BIDIRECTIONAL)
(BIDIRECTIONAL)
STREAMS
STREAMS
LOCAL
H1x0
5-8920 (F)
21
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