T-8110L AGERE [Agere Systems], T-8110L Datasheet - Page 31

• Manufacturer Part Number: T-8110L
• Manufacturer: AGERE [Agere Systems]

February 2004
Agere Systems Inc.
5 Operating Control and Status
5.1 Control Registers
Table 16. Reset Registers
5.1.2 Master Output Enable Register
The master output enable register is used to control master output enables to various groups of T8110L signals,
including the following:
T8110L outputs that are not programmatically enabled (i.e., always driven except during reset) include the follow-
ing:
CLKERR, SYSERR, PRI_REF_OUT, NR1_SEL_OUT, and NR2_SEL_OUT.
Address
0x00100 Soft Reset
0x00101 Reset Select
Byte
L-bus data streams (L_D[31:0])
L-bus clocks (L_SC[3:0], FG[7:0] when used as frame group outputs)
H-bus data streams (CT_D[31:0])
H-bus clocks (CT_C8_A, /CT_FRAME_A, CT_C8_B, /CT_FRAME_B, CT_NETREF1,CT_NETREF2, /C16+,
/C16–, /C4, C2, SCLK, /SCLKx2, /FR_COMP)
GPIO (GP[7:0])
FGIO (FG[7:0] when used as programmable register outputs)
Name
Bit(s) Mnemonic
(continued)
7:0
7:2
1
0
Reserved
SRESR
HRBEB
SRBEB
(continued)
0000 0000
0000 0001
0000 0010
0001 0000
0010 0000
Value
0000
0
1
0
1
NOP (default value).
Reset all registers and connection valid flags.
Reset all registers.
Reset interrupt pending and in-service registers.
Reset interrupt in-service register only.
NOP (default).
Disable hard reset to back end.
Enable hard reset to back end (default).
Disable soft resets to back end.
Enable soft resets to back end (default).
Ambassador T8110L H.100/H.110 Switch
Function
31