T-8110L AGERE [Agere Systems], T-8110L Datasheet - Page 11

• Manufacturer Part Number: T-8110L
• Manufacturer: AGERE [Agere Systems]

February 2004
Agere Systems Inc.
2 Pin Description
2.1 Interface Signals
Table 4. Clock Circuit Interface Signals
Table 5. GPIO Interface Signals
Table 6. Miscellaneous Interface Signals
Table 7. JTAG Signals
TESTMODE
NR1_SEL_OUT
NR2_SEL_OUT
PRI_REF_OUT
SYSERR
CLKERR
RESET#
PRI_REF_IN
NR1_DIV_IN
NR2_DIV_IN
XTAL1_OUT
XTAL2_OUT
TRST#
Signal
Signal
TCLK_OUT
LPUE
XTAL1_IN
XTAL2_IN
PEN
TMS
TDO
TCK
TDI
Signal
LREF
Signal
GP0
GP1
GP2
GP3
GP4
GP5
GP6
GP7
Out
Out
Out
I/O
I/O
In
In
In
In
In
In
In
In
(continued)
(continued)
Width
Width
Out
Out
Out
Out
Out
Out
I/O
In
In
In
In
In
In
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
1
1
1
1
1
1
1
1
1
1
1
Chip reset.
System error indicator.
Clocking error indicator.
Pull-up enable for signals: FG, GP, L_D, LREF, D, NR1_DIV_IN, NR2_DIV_IN,
PRI_REF_IN.
Reserved. Must be left unconnected.
Reserved. Must be left unconnected.
JTAG reset.
JTAG clock.
JTAG mode select.
JTAG data in.
JTAG data out.
Width
Width
1
1
1
1
8
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Crystal oscillator #1 input (16.384 MHz).
Crystal oscillator #1 feedback.
Crystal oscillator #2 input (6.176 MHz or 12.352 MHz).
Crystal oscillator #2 feedback.
Local clock reference inputs.
Internal chip clock output.
Main divider reference out for CLAD/DJAT.
CLAD/DJAT reference in for APLL1.
CT_NETREF1 selection out for CLAD/DJAT.
CLAD/DJAT reference in for CT_NETREF1 divider.
CT_NETREF2 selection out for CLAD/DJAT.
CLAD/DJAT reference in for CT_NETREF2 divider.
GPIO bit 0 I/O
GPIO bit 1 I/O
GPIO bit 2 I/O
GPIO bit 3 I/O
GPIO bit 4 I/O
GPIO bit 5 I/O
GPIO bit 6 I/O
GPIO bit 7 I/O
GPIO Function
Ambassador T8110L H.100/H.110 Switch
Function
Function
Function
A-master indicator out.
B-master indicator out.
Alternate Function
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