T-8110L AGERE [Agere Systems], T-8110L Datasheet - Page 115

• Manufacturer Part Number: T-8110L
• Manufacturer: AGERE [Agere Systems]

February 2004
Agere Systems Inc.
12 Connection Control
12.2 Switching Operation
The basic building block of switching is one-half simplex connections loaded into the connection memory. Each
connection memory location controls data flow, either from a serial stream input to a location in data memory, or
from data memory to a serial stream output. A typical telephony simplex switch connection would use one from
and one to connection, each using the same data memory location.
12.2.1 Memory Architecture and Configuration
12.2.1.1 Connection Memory
The T8110L connection memory consists of 8192 locations, one location for each of the possible stream/time-slot
combinations, to provide a full nonblocking switch for up to 128 time slots on 32 H1x0 streams (CT_D[31:0]) and
32 local streams (L_D[31:0]). Connection memory is physically addressed by time slot (7 bits), H1x0/local select
(1 bit), and stream (5 bits).
The 8192 locations are divided into four pages of 2048, with each page dedicated to a set of 16 serial streams as
follows:
!
!
!
!
Each of these connection memory pages are initialized at reset (valid bit entries are reset to invalid). Additionally,
each page may be initialized individually via software command, RESET PAGE (refer to Figure 21 on page 114).
Connection memory locations contain the following control information:
!
!
!
!
!
!
H1x0 even streams (CT_D[30, 28, . . . 0])
H1x0 odd streams (CT_D[31, 29, . . . 1])
Local high streams (L_D[31:16])
Local low streams (L_D[15:0])
VALID bit indicates that a valid switch connection exists for this stream/time slot.
RWS indicates whether the connection is from (from serial stream to data memory) or to (from DATA memory to
serial stream).
VFC (virtual framing control) controls which data page is used in double-buffer scenarios.
Note: There are two data memory configurations that allow double-buffering of the data, in order to create con-
PME indicates a pattern mode connection.
TAG is the data memory location used for this one-half simplex switch connection (or the data pattern sent to
serial output for pattern mode connections).
SUBRATE information is subrate switching control (bitswap).
stant frame delay connections. Refer to Section 12.2.1.2 on page 116 and Section 12.2.2.1 on page 117.
(continued)
Ambassador T8110L H.100/H.110 Switch
115